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Documentation: Fix missformatted table and typo of non-breakable space
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docs/src/man/man9/hm2_rpspi.9.adoc

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@@ -97,7 +97,7 @@ TBD.
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== SPI CLOCK RATES
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The maximum SPI clock of the BCM2835-SPI driver and the 7i90 is
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documented over 32␗MHz. The SPI driver can provide frequencies well
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documented over 32 MHz. The SPI driver can provide frequencies well
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beyond what is acceptable for the 7i90. A safe value to start with would
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be 12.5 MHz (spiclk_rate=12500) and then work your way up from there.
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@@ -107,22 +107,36 @@ The base frequency is 250 MHz and the divider for SPI0/SPI1 scales using
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discrete factors. The following list specifies the *spiclk_rate* setting
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and the discrete SPI clock frequency (250 MHz / (2__n__) for _n_ > 1):
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[cols=">,>"]
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.spiclk_rate and corresponding SPI clock frequency
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[%header,%autowidth,cols=">,>",grid=none,frame=ends]
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|===
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| _n_ | Frequency range |
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| 2 | 62500 - 62.500 MHz, |
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| 3 | 41667 - 41.667 MHz, |
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| 4 | 31250 - 31.250 MHz, |
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| 5 | 25000 - 25.000 MHz, |
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| 6 | 20834 - 20.833 MHz, |
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| 7 | 17858 - 17.857 MHz, |
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| 8 | 15625 - 15.625 MHz, |
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| 9 | 13889 - 13.889 MHz, |
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| 10 | 12500 - 12.500 MHz, |
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| 11 | 11364 - 11.364 MHz, |
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| 12 | 10417 - 10.417 MHz, |
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| 13 | 9616 - 9.615 MHz, |
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| 14+ | .... |
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^| _n_ ^| Frequency range (MHz)
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| 2 | 62.500 - 62.500
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| 3 | 41.667 - 41.667
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| 4 | 31.250 - 31.250
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| 5 | 25.000 - 25.000
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| 6 | 20.834 - 20.833
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| 7 | 17.858 - 17.857
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| 8 | 15.625 - 15.625
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| 9 | 13.889 - 13.889
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| 10 | 12.500 - 12.500
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| 11 | 11.364 - 11.364
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| 12 | 10.417 - 10.417
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| 13 | 9.616 - 9.615
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| 14+ | ....
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|===
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The lowest selectable SPI clock frequency is 30 kHz (spiclk_rate=30) for
@@ -143,8 +157,8 @@ Writing to the 7i90 may be done faster than reading. This is especially
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important if you have "long" wires or any buffers on the SPI-bus path.
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You can set the read clock frequency to a lower value (using
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*spiclk_rate_rd*) to counter the effects of the SPI-bus round-trip
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needed for read actions. For example, you can write at 41.67␗MHz and
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read at 25.00␗MHz.
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needed for read actions. For example, you can write at 41.67 MHz and
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read at 25.00 MHz.
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It should be noted that the Rpi3 *must* have an adequate 5V power supply
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and the power should be properly decoupled right on the 40-pin I/O

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