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Add a patch for printing the AMD Zen CPU reset reason
If I intentionally trigger a CPU soft reset I see this: ``` admin@gold208-dut:~$ sudo dmesg | grep -i reason [ 0.635233] x86/amd: Previous system reset reason [0x00080800]: software wrote 0x6 to reset control register 0xCF9 ``` If I intentionally trigger the CPU FCH Watchdog, I see this: ``` admin@gold208-dut:~$ sudo dmesg | grep reason [ 0.632563] x86/amd: Previous system reset reason [0x02000800]: hardware watchdog timer expired ``` Upstream from here: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git/commit/?id=ab8131028710d009ab93d6bffd2a2749ade909b0 The patch had to be adapted to v6.1 we're using, that was basically adding the entire contents (5 constants) of `fch.h` as the file didn't exist in v6.1, and updating the patch for `amd.c` for context. Signed-off-by: Nate White <[email protected]>
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‎patches-sonic/0001-x86-CPU-AMD-Print-the-reason-for-the-last-reset.patch‎

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From 498de92a48a4aadc233cd560414f585601f54e52 Mon Sep 17 00:00:00 2001
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From: Yazen Ghannam <[email protected]>
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Date: Tue, 22 Apr 2025 18:48:30 -0500
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Subject: [PATCH 1/2] x86/CPU/AMD: Print the reason for the last reset
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[ Upstream commit ab8131028710d009ab93d6bffd2a2749ade909b0 ]
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The following register contains bits that indicate the cause for the
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previous reset.
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PMx000000C0 (FCH::PM::S5_RESET_STATUS)
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This is useful for debug. The reasons for reset are broken into 6 high level
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categories. Decode it by category and print during boot.
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Specifics within a category are split off into debugging documentation.
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The register is accessed indirectly through a "PM" port in the FCH. Use
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MMIO access in order to avoid restrictions with legacy port access.
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Use a late_initcall() to ensure that MMIO has been set up before trying to
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access the register.
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This register was introduced with AMD Family 17h, so avoid access on older
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families. There is no CPUID feature bit for this register.
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[ bp: Simplify the reason dumping loop.
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- merge a fix to not access an array element after the last one:
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https://lore.kernel.org/r/[email protected]
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Reported-by: James Dutton <[email protected]>
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]
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[ mingo:
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- Use consistent .rst formatting
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- Fix 'Sleep' class field to 'ACPI-State'
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- Standardize pin messages around the 'tripped' verbiage
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- Remove reference to ring-buffer printing & simplify the wording
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- Use curly braces for multi-line conditional statements ]
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Signed-off-by: Yazen Ghannam <[email protected]>
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Co-developed-by: Mario Limonciello <[email protected]>
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Signed-off-by: Mario Limonciello <[email protected]>
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Signed-off-by: Borislav Petkov (AMD) <[email protected]>
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Signed-off-by: Ingo Molnar <[email protected]>
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Signed-off-by: Borislav Petkov (AMD) <[email protected]>
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Link: https://lore.kernel.org/[email protected]
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---
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arch/x86/include/asm/amd/fch.h | 13 ++++++++
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arch/x86/kernel/cpu/amd.c | 54 ++++++++++++++++++++++++++++++++++
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2 files changed, 67 insertions(+)
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create mode 100644 arch/x86/include/asm/amd/fch.h
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diff --git a/arch/x86/include/asm/amd/fch.h b/arch/x86/include/asm/amd/fch.h
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new file mode 100644
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index 000000000..2cf5153ed
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--- /dev/null
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+++ b/arch/x86/include/asm/amd/fch.h
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@@ -0,0 +1,13 @@
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+/* SPDX-License-Identifier: GPL-2.0 */
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+#ifndef _ASM_X86_AMD_FCH_H_
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+#define _ASM_X86_AMD_FCH_H_
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+
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+#define FCH_PM_BASE 0xFED80300
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+
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+/* Register offsets from PM base: */
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+#define FCH_PM_DECODEEN 0x00
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+#define FCH_PM_DECODEEN_SMBUS0SEL GENMASK(20, 19)
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+#define FCH_PM_SCRATCH 0x80
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+#define FCH_PM_S5_RESET_STATUS 0xC0
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+
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+#endif /* _ASM_X86_AMD_FCH_H_ */
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diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
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index 37796a1d0..6a2177a22 100644
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--- a/arch/x86/kernel/cpu/amd.c
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+++ b/arch/x86/kernel/cpu/amd.c
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@@ -9,6 +9,7 @@
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#include <linux/sched/clock.h>
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#include <linux/random.h>
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#include <linux/topology.h>
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+#include <asm/amd/fch.h>
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#include <asm/processor.h>
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#include <asm/apic.h>
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#include <asm/cacheinfo.h>
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@@ -1310,3 +1311,56 @@ void noinstr amd_clear_divider(void)
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:: "a" (0), "d" (0), "r" (1));
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}
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EXPORT_SYMBOL_GPL(amd_clear_divider);
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+
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+static const char * const s5_reset_reason_txt[] = {
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+ [0] = "thermal pin BP_THERMTRIP_L was tripped",
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+ [1] = "power button was pressed for 4 seconds",
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+ [2] = "shutdown pin was tripped",
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+ [4] = "remote ASF power off command was received",
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+ [9] = "internal CPU thermal limit was tripped",
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+ [16] = "system reset pin BP_SYS_RST_L was tripped",
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+ [17] = "software issued PCI reset",
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+ [18] = "software wrote 0x4 to reset control register 0xCF9",
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+ [19] = "software wrote 0x6 to reset control register 0xCF9",
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+ [20] = "software wrote 0xE to reset control register 0xCF9",
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+ [21] = "ACPI power state transition occurred",
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+ [22] = "keyboard reset pin KB_RST_L was tripped",
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+ [23] = "internal CPU shutdown event occurred",
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+ [24] = "system failed to boot before failed boot timer expired",
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+ [25] = "hardware watchdog timer expired",
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+ [26] = "remote ASF reset command was received",
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+ [27] = "an uncorrected error caused a data fabric sync flood event",
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+ [29] = "FCH and MP1 failed warm reset handshake",
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+ [30] = "a parity error occurred",
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+ [31] = "a software sync flood event occurred",
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+};
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+
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+static __init int print_s5_reset_status_mmio(void)
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+{
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+ unsigned long value;
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+ void __iomem *addr;
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+ int i;
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+
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+ if (!cpu_feature_enabled(X86_FEATURE_ZEN))
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+ return 0;
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+
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+ addr = ioremap(FCH_PM_BASE + FCH_PM_S5_RESET_STATUS, sizeof(value));
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+ if (!addr)
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+ return 0;
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+
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+ value = ioread32(addr);
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+ iounmap(addr);
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+
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+ for (i = 0; i < ARRAY_SIZE(s5_reset_reason_txt); i++) {
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+ if (!(value & BIT(i)))
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+ continue;
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+
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+ if (s5_reset_reason_txt[i]) {
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+ pr_info("x86/amd: Previous system reset reason [0x%08lx]: %s\n",
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+ value, s5_reset_reason_txt[i]);
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+ }
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+ }
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+
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+ return 0;
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+}
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+late_initcall(print_s5_reset_status_mmio);
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--
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2.39.5
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‎patches-sonic/0002-x86-CPU-AMD-Ignore-invalid-reset-reason-value.patch‎

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From 5dbe8f4b35737d66b465fd3a16dd8db84f987d1a Mon Sep 17 00:00:00 2001
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From: Yazen Ghannam <[email protected]>
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Date: Mon, 21 Jul 2025 18:11:54 +0000
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Subject: [PATCH 2/2] x86/CPU/AMD: Ignore invalid reset reason value
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[ Upstream commit e9576e078220c50ace9e9087355423de23e25fa5 ]
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The reset reason value may be "all bits set", e.g. 0xFFFFFFFF. This is a
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commonly used error response from hardware. This may occur due to a real
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hardware issue or when running in a VM.
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The user will see all reset reasons reported in this case.
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Check for an error response value and return early to avoid decoding
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invalid data.
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Also, adjust the data variable type to match the hardware register size.
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Fixes: ab8131028710 ("x86/CPU/AMD: Print the reason for the last reset")
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Reported-by: Libing He <[email protected]>
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Signed-off-by: Yazen Ghannam <[email protected]>
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Signed-off-by: Borislav Petkov (AMD) <[email protected]>
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Reviewed-by: Mario Limonciello <[email protected]>
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Cc: [email protected]
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Link: https://lore.kernel.org/[email protected]
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---
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arch/x86/kernel/cpu/amd.c | 8 ++++++--
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1 file changed, 6 insertions(+), 2 deletions(-)
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diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
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index 6a2177a22..eb5777d6f 100644
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--- a/arch/x86/kernel/cpu/amd.c
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+++ b/arch/x86/kernel/cpu/amd.c
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@@ -1337,8 +1337,8 @@ static const char * const s5_reset_reason_txt[] = {
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static __init int print_s5_reset_status_mmio(void)
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{
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- unsigned long value;
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void __iomem *addr;
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+ u32 value;
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int i;
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if (!cpu_feature_enabled(X86_FEATURE_ZEN))
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@@ -1351,12 +1351,16 @@ static __init int print_s5_reset_status_mmio(void)
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value = ioread32(addr);
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iounmap(addr);
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+ /* Value with "all bits set" is an error response and should be ignored. */
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+ if (value == U32_MAX)
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+ return 0;
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+
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for (i = 0; i < ARRAY_SIZE(s5_reset_reason_txt); i++) {
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if (!(value & BIT(i)))
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continue;
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if (s5_reset_reason_txt[i]) {
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- pr_info("x86/amd: Previous system reset reason [0x%08lx]: %s\n",
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+ pr_info("x86/amd: Previous system reset reason [0x%08x]: %s\n",
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value, s5_reset_reason_txt[i]);
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}
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}
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--
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2.39.5
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‎patches-sonic/series‎

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@@ -201,6 +201,10 @@ cisco-npu-disable-other-bars.patch
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0001-fix-os-crash-caused-by-optoe-when-class-switch.patch
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0001-tty-8250-HSUART-DMA-be-deactivated-for-DNV-CPU.patch
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# Nexthop patches
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0001-x86-CPU-AMD-Print-the-reason-for-the-last-reset.patch
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0002-x86-CPU-AMD-Ignore-invalid-reset-reason-value.patch
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# Fix to avoid kernel panic on Kernel 6.1.94
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# https://github.com/sonic-net/sonic-buildimage/issues/20901
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#PCI-ASPM-Fix-link-state-exit-during-switch-upstream.patch # Upstreamed

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