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Merge branch 'master' into xsight-platform-dev
2 parents f459e81 + 65e3cc3 commit b0408c9

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10 files changed

+90
-15
lines changed

10 files changed

+90
-15
lines changed

sonic_platform_base/sonic_sfp/sfputilhelper.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -90,7 +90,7 @@ def read_porttab_mappings(self, porttabfile, asic_inst=0):
9090
self.logical_to_asic[intf_name] = asic_inst
9191

9292
self.logical.extend(logical)
93-
self.logical = list(set(self.logical))
93+
self.logical = list(OrderedDict.fromkeys(self.logical).keys())
9494
self.logical_to_physical.update(logical_to_physical)
9595
self.physical_to_logical.update(physical_to_logical)
9696

sonic_platform_base/sonic_xcvr/api/public/cmis.py

Lines changed: 13 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -43,6 +43,18 @@ def get_model(self):
4343
'''
4444
return self.xcvr_eeprom.read(consts.VENDOR_PART_NO_FIELD)
4545

46+
def get_cable_length_type(self):
47+
'''
48+
This function returns the cable type of the module
49+
'''
50+
return "Length Cable Assembly(m)"
51+
52+
def get_cable_length(self):
53+
'''
54+
This function returns the cable length of the module
55+
'''
56+
return self.xcvr_eeprom.read(consts.LENGTH_ASSEMBLY_FIELD)
57+
4658
def get_vendor_rev(self):
4759
'''
4860
This function returns the revision level for part number provided by vendor
@@ -146,7 +158,6 @@ def get_transceiver_info(self):
146158
"encoding": "N/A", # Not supported
147159
"ext_identifier": "%s (%sW Max)" % (power_class, max_power),
148160
"ext_rateselect_compliance": "N/A", # Not supported
149-
"cable_type": "Length Cable Assembly(m)",
150161
"cable_length": float(admin_info[consts.LENGTH_ASSEMBLY_FIELD]),
151162
"nominal_bit_rate": 0, # Not supported
152163
"vendor_date": admin_info[consts.VENDOR_DATE_FIELD],
@@ -160,6 +171,7 @@ def get_transceiver_info(self):
160171
xcvr_info['media_lane_count'] = self.get_media_lane_count()
161172
xcvr_info['host_lane_assignment_option'] = self.get_host_lane_assignment_option()
162173
xcvr_info['media_lane_assignment_option'] = self.get_media_lane_assignment_option()
174+
xcvr_info['cable_type'] = self.get_cable_length_type()
163175
apsel_dict = self.get_active_apsel_hostlane()
164176
for lane in range(1, self.NUM_CHANNELS+1):
165177
xcvr_info["%s%d" % ("active_apsel_hostlane", lane)] = \

sonic_platform_base/sonic_xcvr/codes/public/sff8636.py

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -60,6 +60,7 @@ class Sff8636Codes(Sff8024):
6060
32: "10GBASE-LR",
6161
64: "10GBASE-LRM",
6262
128: "Extended",
63+
136: "40GBASE-CR4,Extended"
6364
}
6465

6566
SONET_COMPLIANCE = {

sonic_platform_base/sonic_xcvr/mem_maps/public/sff8636.py

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -50,9 +50,7 @@ def __init__(self, codes):
5050
),
5151
CodeRegField(consts.CONNECTOR_FIELD, self.get_addr(0, 130), self.codes.CONNECTORS),
5252
RegGroupField(consts.SPEC_COMPLIANCE_FIELD,
53-
CodeRegField(consts.ETHERNET_10_40G_COMPLIANCE_FIELD, self.get_addr(0, 131), self.codes.ETHERNET_10_40G_COMPLIANCE,
54-
*(RegBitField("%s_%d" % (consts.ETHERNET_10_40G_COMPLIANCE_FIELD, bit), bit) for bit in range(0, 7))
55-
),
53+
CodeRegField(consts.ETHERNET_10_40G_COMPLIANCE_FIELD, self.get_addr(0, 131), self.codes.ETHERNET_10_40G_COMPLIANCE),
5654
CodeRegField(consts.SONET_COMPLIANCE_FIELD, self.get_addr(0, 132), self.codes.SONET_COMPLIANCE),
5755
CodeRegField(consts.SAS_SATA_COMPLIANCE_FIELD, self.get_addr(0, 133), self.codes.SAS_SATA_COMPLIANCE),
5856
CodeRegField(consts.GIGABIT_ETHERNET_COMPLIANCE_FIELD, self.get_addr(0, 134), self.codes.GIGABIT_ETHERNET_COMPLIANCE),

sonic_platform_base/sonic_xcvr/sfp_optoe_base.py

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -230,6 +230,15 @@ def set_optoe_write_max(self, write_max):
230230
except (OSError, IOError):
231231
pass
232232

233+
def set_optoe_write_timeout(self, write_timeout):
234+
sys_path = self.get_eeprom_path()
235+
sys_path = sys_path.replace("eeprom", "write_timeout")
236+
try:
237+
with open(sys_path, mode='w') as f:
238+
f.write(str(write_timeout))
239+
except (OSError, IOError):
240+
pass
241+
233242
def read_eeprom(self, offset, num_bytes):
234243
try:
235244
with open(self.get_eeprom_path(), mode='rb', buffering=0) as f:

sonic_platform_base/sonic_xcvr/xcvr_api_factory.py

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,8 @@
3434
VENDOR_NAME_LENGTH = 16
3535
VENDOR_PART_NUM_LENGTH = 16
3636

37+
CREDO_800G_AEC_VENDOR_PN_LIST = ["CAC81X321M2MC1MS", "CAC815321M2MC1MS", "CAC82X321M2MC1MS"]
38+
3739
class XcvrApiFactory(object):
3840
def __init__(self, reader, writer):
3941
self.reader = reader
@@ -72,7 +74,7 @@ def create_xcvr_api(self):
7274
if id == 0x18 or id == 0x19 or id == 0x1e:
7375
vendor_name = self._get_vendor_name()
7476
vendor_pn = self._get_vendor_part_num()
75-
if vendor_name == 'Credo' and vendor_pn == 'CAC81X321M2MC1MS':
77+
if vendor_name == 'Credo' and vendor_pn in CREDO_800G_AEC_VENDOR_PN_LIST:
7678
codes = CmisAec800gCodes
7779
mem_map = CmisAec800gMemMap(CmisAec800gCodes)
7880
xcvr_eeprom = XcvrEeprom(self.reader, self.writer, mem_map)

sonic_y_cable/credo/y_cable_credo.py

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3254,7 +3254,10 @@ def debug_dump_registers(self, option=None):
32543254
if api_ver >= 0x18:
32553255
result['queue_info'] = self.queue_info()
32563256

3257-
lanes = [0,1,2,3,12,13,14,15,20,21,22,23]
3257+
if '1MS' in result['pn']:
3258+
lanes = [0,1,12,13,16,17]
3259+
else:
3260+
lanes = [0,1,2,3,12,13,14,15,20,21,22,23]
32583261

32593262
for ln in list(lanes):
32603263
data = self.get_serdes_params(ln)

tests/sfputilhelper_test.py

Lines changed: 11 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -78,10 +78,11 @@ def test_read_port_mappings(self):
7878
sfputil_helper.read_porttab_mappings(self.port_config_file, 0)
7979

8080
logical_port_list = sfputil_helper.logical
81+
8182
assert len(logical_port_list) == len(PORT_LIST)
8283

83-
for logical_port_name in logical_port_list:
84-
assert logical_port_name in PORT_LIST
84+
for logical_port, port in zip(logical_port_list, PORT_LIST):
85+
assert logical_port == port
8586

8687

8788
@mock.patch('portconfig.get_hwsku_file_name', mock.MagicMock(return_value=hwsku_json_file))
@@ -90,28 +91,30 @@ def test_read_all_port_mappings(self):
9091
sfputil_helper = sfputilhelper.SfpUtilHelper()
9192
sfputil_helper.logical = []
9293
sfputil_helper.logical_to_physical = {}
93-
sfputil_helper.physical_to_logica = {}
94+
sfputil_helper.physical_to_logical = {}
9495
sfputil_helper.read_all_porttab_mappings(self.platform_dir, 2)
9596
logical_port_list = sfputil_helper.logical
9697

9798
assert len(logical_port_list) == len(PORT_LIST)
98-
for logical_port_name in logical_port_list:
99-
assert logical_port_name in PORT_LIST
99+
100+
for logical_port, port in zip(logical_port_list, PORT_LIST):
101+
assert logical_port == port
102+
100103
assert sfputil_helper.logical_to_physical == LOGICAL_TO_PHYSICAL
101104
assert sfputil_helper.physical_to_logical == PHYSICAL_TO_LOGICAL
102105

103106
# test platform.json case
104107

105108
sfputil_helper.logical = []
106109
sfputil_helper.logical_to_physical = {}
107-
sfputil_helper.physical_to_logica = {}
110+
sfputil_helper.physical_to_logical = {}
108111
sfputil_helper.read_all_porttab_mappings(self.platform_json_dir, 2)
109112
logical_port_list = sfputil_helper.logical
110113

111114
assert len(logical_port_list) == len(PORT_LIST)
112115

113-
for logical_port_name in logical_port_list:
114-
assert logical_port_name in PORT_LIST
116+
for logical_port, port in zip(logical_port_list, PORT_LIST):
117+
assert logical_port == port
115118

116119
assert sfputil_helper.logical_to_physical == LOGICAL_TO_PHYSICAL
117120
assert sfputil_helper.physical_to_logical == PHYSICAL_TO_LOGICAL

tests/sonic_xcvr/test_cmis.py

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,19 @@ def test_get_model(self, mock_response, expected):
3232
result = self.api.get_model()
3333
assert result == expected
3434

35+
def test_get_cable_length_type(self):
36+
assert self.api.get_cable_length_type() == "Length Cable Assembly(m)"
37+
38+
@pytest.mark.parametrize("mock_response, expected", [
39+
("0.0", "0.0"),
40+
("1.2", "1.2")
41+
])
42+
def test_get_cable_length(self, mock_response, expected):
43+
self.api.xcvr_eeprom.read = MagicMock()
44+
self.api.xcvr_eeprom.read.return_value = mock_response
45+
result = self.api.get_cable_length()
46+
assert result == expected
47+
3548
@pytest.mark.parametrize("mock_response, expected", [
3649
("0.0", "0.0"),
3750
("1.2", "1.2")

tests/sonic_xcvr/test_sfp_optoe_base.py

Lines changed: 34 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
from unittest.mock import mock_open
12
from mock import MagicMock
23
from mock import patch
34
import pytest
@@ -79,3 +80,36 @@ def test_get_vdm_unfreeze_status(self, mock_response1, mock_response2, expected)
7980
result = self.sfp_optoe_api.get_vdm_unfreeze_status()
8081
assert result == expected
8182

83+
@patch("builtins.open", new_callable=mock_open)
84+
@patch.object(SfpOptoeBase, 'get_eeprom_path')
85+
def test_set_optoe_write_timeout_success(self, mock_get_eeprom_path, mock_open):
86+
mock_get_eeprom_path.return_value = "/sys/bus/i2c/devices/1-0050/eeprom"
87+
expected_path = "/sys/bus/i2c/devices/1-0050/write_timeout"
88+
expected_timeout = 1
89+
90+
self.sfp_optoe_api.set_optoe_write_timeout(expected_timeout)
91+
92+
mock_open.assert_called_once_with(expected_path, mode='w')
93+
mock_open().write.assert_called_once_with(str(expected_timeout))
94+
95+
@patch("builtins.open", new_callable=mock_open)
96+
@patch.object(SfpOptoeBase, 'get_eeprom_path')
97+
def test_set_optoe_write_timeout_ioerror(self, mock_get_eeprom_path, mock_open):
98+
mock_get_eeprom_path.return_value = "/sys/bus/i2c/devices/1-0050/eeprom"
99+
expected_timeout = 1
100+
mock_open.side_effect = IOError
101+
102+
self.sfp_optoe_api.set_optoe_write_timeout(expected_timeout)
103+
104+
mock_open.assert_called()
105+
106+
@patch("builtins.open", new_callable=mock_open)
107+
@patch.object(SfpOptoeBase, 'get_eeprom_path')
108+
def test_set_optoe_write_timeout_oserror(self, mock_get_eeprom_path, mock_open):
109+
mock_get_eeprom_path.return_value = "/sys/bus/i2c/devices/1-0050/eeprom"
110+
expected_timeout = 1
111+
mock_open.side_effect = OSError
112+
113+
self.sfp_optoe_api.set_optoe_write_timeout(expected_timeout)
114+
115+
mock_open.assert_called()

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