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* gcc.target/i386/20030926-1.c: Add dg-additional-options.
 * gcc.target/i386/abi-2.c: Ditto. * gcc.target/i386/interrupt-sibcall-2.c: Ditto. * gcc.target/i386/pr22076.c: Ditto. * gcc.target/i386/pr37216.c: Ditto. * gcc.target/i386/pr39431.c: Ditto. * gcc.target/i386/pr40906-1.c: Ditto. * gcc.target/i386/pr40906-2.c: Ditto. * gcc.target/i386/pr43766.c: Ditto. * gcc.target/i386/pr46226.c: Ditto. * gcc.target/i386/pr46470.c: Ditto. * gcc.target/i386/pr59929.c: Ditto. * gcc.target/i386/sse-10.c: Ditto. * gcc.target/i386/vararg-1.c: Ditto. * gcc.target/i386/vararg-1.c: Ditto. * gcc.target/i386/asm-6.c: Compile for fpic target only. * gcc.target/i386/pr44223.c: Ditto. * gcc.target/i386/bitfield1.c (dg-options): Remove target selector. * gcc.target/i386/bitfield2.c (dg-options): Ditto. * gcc.target/i386/pr67480.c (dg-options): Ditto. * gcc.target/i386/vect-cond-1.c (dg-options): Ditto. * gcc.target/i386/bittest.c (scan-assembler-times): Ditto. * gcc.target/i386/darwin-fpmath.c (dg-do): Simplify target selector. * gcc.target/i386/mvc9.c: Compile for lto target only. * gcc.target/i386/pr45234.c: Compile for ia32 target only. * gcc.target/i386/pr49866.c: Compile for lp64 target only. * gcc.target/i386/pr57091.c: Ditto. * gcc.target/i386/pr61599-2.c: Ditto. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@251417 138bc75d-0d04-0410-961f-82ee72b054a4
1 parent 725e841 commit 8bbf8d1

30 files changed

+81
-55
lines changed

‎gcc/testsuite/ChangeLog‎

Lines changed: 36 additions & 7 deletions
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@@ -1,16 +1,46 @@
1+
2017-08-29 Uros Bizjak <[email protected]>
2+
3+
* gcc.target/i386/20030926-1.c: Add dg-additional-options.
4+
* gcc.target/i386/abi-2.c: Ditto.
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* gcc.target/i386/interrupt-sibcall-2.c: Ditto.
6+
* gcc.target/i386/pr22076.c: Ditto.
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* gcc.target/i386/pr37216.c: Ditto.
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* gcc.target/i386/pr39431.c: Ditto.
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* gcc.target/i386/pr40906-1.c: Ditto.
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* gcc.target/i386/pr40906-2.c: Ditto.
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* gcc.target/i386/pr43766.c: Ditto.
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* gcc.target/i386/pr46226.c: Ditto.
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* gcc.target/i386/pr46470.c: Ditto.
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* gcc.target/i386/pr59929.c: Ditto.
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* gcc.target/i386/sse-10.c: Ditto.
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* gcc.target/i386/vararg-1.c: Ditto.
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* gcc.target/i386/vararg-1.c: Ditto.
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* gcc.target/i386/asm-6.c: Compile for fpic target only.
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* gcc.target/i386/pr44223.c: Ditto.
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* gcc.target/i386/bitfield1.c (dg-options): Remove target selector.
21+
* gcc.target/i386/bitfield2.c (dg-options): Ditto.
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* gcc.target/i386/pr67480.c (dg-options): Ditto.
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* gcc.target/i386/vect-cond-1.c (dg-options): Ditto.
24+
* gcc.target/i386/bittest.c (scan-assembler-times): Ditto.
25+
* gcc.target/i386/darwin-fpmath.c (dg-do): Simplify target selector.
26+
* gcc.target/i386/mvc9.c: Compile for lto target only.
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* gcc.target/i386/pr45234.c: Compile for ia32 target only.
28+
* gcc.target/i386/pr49866.c: Compile for lp64 target only.
29+
* gcc.target/i386/pr57091.c: Ditto.
30+
* gcc.target/i386/pr61599-2.c: Ditto.
31+
132
2017-08-29 Bill Schmidt <[email protected]>
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334
PR tree-optimization/81503
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* gcc.c-torture/execute/pr81503.c: New file.
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637
2017-08-29 Martin Liska <[email protected]>
738

8-
* gcc.dg/tree-prof/update-loopch.c: Scan patterns in
9-
switchlower.
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* gcc.dg/tree-prof/update-loopch.c: Scan patterns in switchlower.
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* gcc.dg/tree-ssa/vrp104.c: Likewise.
1141

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2017-08-29 Richard Biener <[email protected]>
13-
Dominik Infuehr <[email protected]>
43+
Dominik Infuehr <[email protected]>
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* gcc.dg/vect/costmodel/x86_64/costmodel-vect-slp.c: New testcase.
1646

@@ -129,8 +159,7 @@
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130160
2017-08-24 Michael Meissner <[email protected]>
131161

132-
* gcc.target/powerpc/dform-1.c: Delete -mpower9-dform*
133-
options.
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* gcc.target/powerpc/dform-1.c: Delete -mpower9-dform* options.
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* gcc.target/powerpc/dform-2.c: Likewise.
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* gcc.target/powerpc/dform-3.c: Likewise.
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* gcc.target/powerpc/pr71656-1.c: Likewise.
@@ -147,8 +176,8 @@
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148177
2017-08-24 Steven Munroe <[email protected]>
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150-
* gcc.target/powerpc/mmx-packuswb-1.c [NO_WARN_X86_INTRINSICS]:
151-
Define. Suppress warning during tests.
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* gcc.target/powerpc/mmx-packuswb-1.c [NO_WARN_X86_INTRINSICS]: Define.
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Suppress warning during tests.
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2017-08-24 Uros Bizjak <[email protected]>
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‎gcc/testsuite/gcc.target/i386/20030926-1.c‎

Lines changed: 1 addition & 1 deletion
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@@ -1,7 +1,7 @@
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/* PR optimization/11741 */
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/* { dg-do compile } */
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/* { dg-options "-O2 -minline-all-stringops" } */
4-
/* { dg-options "-O2 -minline-all-stringops -march=pentium4" { target ia32 } } */
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/* { dg-additional-options "-march=pentium4" { target ia32 } } */
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extern void *memcpy (void *, const void *, __SIZE_TYPE__);
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extern __SIZE_TYPE__ strlen (const char *);

‎gcc/testsuite/gcc.target/i386/abi-2.c‎

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@@ -1,7 +1,7 @@
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/* Make certain that we pass __m256i in the correct register for AVX. */
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/* { dg-do compile } */
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/* { dg-options "-O1 -mavx" } */
4-
/* { dg-options "-mabi=sysv -O1 -mavx" { target x86_64-*-mingw* } } */
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/* { dg-additional-options "-mabi=sysv" { target x86_64-*-mingw* } } */
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typedef long long __m256i __attribute__ ((__vector_size__ (32)));
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__m256i foo (void) { return (__m256i){ 1, 2, 3, 4 }; }

‎gcc/testsuite/gcc.target/i386/asm-6.c‎

Lines changed: 2 additions & 2 deletions
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@@ -1,8 +1,8 @@
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/* PR rtl-optimization/44174 */
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/* Testcase by Jakub Jelinek <[email protected]> */
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4-
/* { dg-do compile } */
5-
/* { dg-options "-O2 -fpic" { target fpic } } */
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/* { dg-do compile { target fpic } } */
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/* { dg-options "-O2 -fpic" } */
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int f0 (int, int, int, int, int);
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int f1 (void);

‎gcc/testsuite/gcc.target/i386/bitfield1.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,7 @@
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// Test for bitfield alignment in structs on IA-32
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// { dg-do run }
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// { dg-require-effective-target ia32 }
4-
// { dg-options "-O2" }
5-
// { dg-options "-mno-align-double -mno-ms-bitfields" { target i?86-*-* x86_64-*-* } }
4+
// { dg-options "-O2 -mno-align-double -mno-ms-bitfields" }
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extern void abort (void);
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extern void exit (int);

‎gcc/testsuite/gcc.target/i386/bitfield2.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,7 @@
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// Test for bitfield alignment in structs on IA-32
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// { dg-do run }
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// { dg-require-effective-target ia32 }
4-
// { dg-options "-O2" }
5-
// { dg-options "-mno-align-double -mno-ms-bitfields" { target i?86-*-* x86_64-*-* } }
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// { dg-options "-O2 -mno-align-double -mno-ms-bitfields" }
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extern void abort (void);
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extern void exit (int);

‎gcc/testsuite/gcc.target/i386/bittest.c‎

Lines changed: 1 addition & 1 deletion
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@@ -19,4 +19,4 @@ gate_rtl_cprop (void)
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memory and mask off bits are unnecessary. In theory we can just count
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the move-with-extension, and and testb instructions. There should be
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only one. */
22-
/* { dg-final { scan-assembler-times "movzbl|and|testb" 1 { target { i?86-*-* x86_64-*-*} } } } */
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/* { dg-final { scan-assembler-times "movzbl|and|testb" 1 } } */

‎gcc/testsuite/gcc.target/i386/darwin-fpmath.c‎

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@@ -1,4 +1,4 @@
1-
/* { dg-do compile { target i?86-*-darwin* x86_64-*-darwin* } } */
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/* { dg-do compile { target *-*-darwin* } } */
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/* { dg-final { scan-assembler "addsd" } } */
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/* Do not add -msse or -msse2 or -mfpmath=sse to the options. GCC is
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supposed to use SSE math on Darwin by default, and libm won't work

‎gcc/testsuite/gcc.target/i386/interrupt-sibcall-2.c‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
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/* { dg-do compile } */
2-
/* { dg-options "-O3 -mgeneral-regs-only -mno-cld -mpreferred-stack-boundary=3" { target { ! { ia32 } } } } */
3-
/* { dg-options "-O3 -mgeneral-regs-only -mno-cld -mpreferred-stack-boundary=2" { target { ia32 } } } */
2+
/* { dg-options "-O3 -mgeneral-regs-only -mno-cld" } */
3+
/* { dg-additional-options "-mpreferred-stack-boundary=3" { target { ! ia32 } } } */
4+
/* { dg-additional-options "-mpreferred-stack-boundary=2" { target { ia32 } } } */
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extern void foo (void *) __attribute__ ((interrupt));
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extern void bar (void) __attribute__ ((no_caller_saved_registers));

‎gcc/testsuite/gcc.target/i386/mvc9.c‎

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@@ -1,6 +1,6 @@
1-
/* { dg-do run } */
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/* { dg-do run { target lto } } */
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/* { dg-require-ifunc "" } */
3-
/* { dg-options "-flto -O2" { target lto } } */
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/* { dg-options "-O2 -flto" } */
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__attribute__((target_clones("avx","arch=slm","arch=core-avx2","default")))
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int

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