@@ -1362,23 +1362,27 @@ ICM_20948_Status_e inv_icm20948_read_mems(ICM_20948_Device_t *pdev, unsigned sho
13621362 return result ;
13631363}
13641364
1365- ICM_20948_Status_e inv_icm20948_set_dmp_sensor_period (ICM_20948_Device_t * pdev , enum inv_icm20948_sensor sensor , uint16_t period )
1365+ ICM_20948_Status_e inv_icm20948_set_dmp_sensor_period (ICM_20948_Device_t * pdev , enum DMP_ODR_Registers odr_reg , uint16_t interval )
13661366{
1367- ICM_20948_Status_e result = ICM_20948_Stat_Ok ;
1367+ // Set the ODR registersand clear the ODR counter
13681368
1369- if (pdev -> _dmp_firmware_available == false)
1370- return ICM_20948_Stat_DMPNotSupported ;
1369+ // In order to set an ODR for a given sensor data, write 2-byte value to DMP using key defined above for a particular sensor.
1370+ // Setting value can be calculated as follows:
1371+ // Value = (DMP running rate (225Hz) / ODR ) - 1
1372+ // E.g. For a 25Hz ODR rate, value= (225/25) -1 = 8.
13711373
1372- uint8_t androidSensor = sensor_type_2_android_sensor (sensor );
1374+ // During run-time, if an ODR is changed, the corresponding rate counter must be reset.
1375+ // To reset, write 2-byte {0,0} to DMP using keys below for a particular sensor:
13731376
1374- uint16_t delta = inv_androidSensor_to_control_bits [androidSensor ];
1377+ ICM_20948_Status_e result = ICM_20948_Stat_Ok ;
1378+ ICM_20948_Status_e result2 = ICM_20948_Stat_Ok ;
13751379
1376- if (delta == 0xFFFF )
1377- return ICM_20948_Stat_SensorNotSupported ;
1380+ if (pdev -> _dmp_firmware_available == false )
1381+ return ICM_20948_Stat_DMPNotSupported ;
13781382
13791383 unsigned char odr_reg_val [2 ];
1380- odr_reg_val [0 ] = (unsigned char )(period >> 8 );
1381- odr_reg_val [1 ] = (unsigned char )(period & 0xff );
1384+ odr_reg_val [0 ] = (unsigned char )(interval >> 8 );
1385+ odr_reg_val [1 ] = (unsigned char )(interval & 0xff );
13821386
13831387 unsigned char odr_count_zero [2 ] = {0x00 , 0x00 };
13841388
@@ -1394,76 +1398,86 @@ ICM_20948_Status_e inv_icm20948_set_dmp_sensor_period(ICM_20948_Device_t *pdev,
13941398 return result ;
13951399 }
13961400
1397- // Set the ODR registers and clear the ODR counters
1398-
1399- // In order to set an ODR for a given sensor data, write 2-byte value to DMP using key defined above for a particular sensor.
1400- // Setting value can be calculated as follows:
1401- // Value = (DMP running rate (225Hz) / ODR ) - 1
1402- // E.g. For a 25Hz ODR rate, value= (225/25) -1 = 8.
1403-
1404- // During run-time, if an ODR is changed, the corresponding rate counter must be reset.
1405- // To reset, write 2-byte {0,0} to DMP using keys below for a particular sensor:
1406-
1407- if ((delta & DMP_Data_Output_Control_1_Compass_Calibr ) > 0 )
1408- {
1409- result |= inv_icm20948_write_mems (pdev , ODR_CPASS_CALIBR , 2 , (const unsigned char * )& odr_reg_val );
1410- result |= inv_icm20948_write_mems (pdev , ODR_CNTR_CPASS_CALIBR , 2 , (const unsigned char * )& odr_count_zero );
1411- }
1412- if ((delta & DMP_Data_Output_Control_1_Gyro_Calibr ) > 0 )
1413- {
1414- result |= inv_icm20948_write_mems (pdev , ODR_GYRO_CALIBR , 2 , (const unsigned char * )& odr_reg_val );
1415- result |= inv_icm20948_write_mems (pdev , ODR_CNTR_GYRO_CALIBR , 2 , (const unsigned char * )& odr_count_zero );
1416- }
1417- if ((delta & DMP_Data_Output_Control_1_Pressure ) > 0 )
1418- {
1419- result |= inv_icm20948_write_mems (pdev , ODR_PRESSURE , 2 , (const unsigned char * )& odr_reg_val );
1420- result |= inv_icm20948_write_mems (pdev , ODR_CNTR_PRESSURE , 2 , (const unsigned char * )& odr_count_zero );
1421- }
1422- if ((delta & DMP_Data_Output_Control_1_Geomag ) > 0 )
1423- {
1424- result |= inv_icm20948_write_mems (pdev , ODR_GEOMAG , 2 , (const unsigned char * )& odr_reg_val );
1425- result |= inv_icm20948_write_mems (pdev , ODR_CNTR_GEOMAG , 2 , (const unsigned char * )& odr_count_zero );
1426- }
1427- if ((delta & DMP_Data_Output_Control_1_PQuat6 ) > 0 )
1428- {
1429- result |= inv_icm20948_write_mems (pdev , ODR_PQUAT6 , 2 , (const unsigned char * )& odr_reg_val );
1430- result |= inv_icm20948_write_mems (pdev , ODR_CNTR_PQUAT6 , 2 , (const unsigned char * )& odr_count_zero );
1431- }
1432- if ((delta & DMP_Data_Output_Control_1_Quat9 ) > 0 )
1433- {
1434- result |= inv_icm20948_write_mems (pdev , ODR_QUAT9 , 2 , (const unsigned char * )& odr_reg_val );
1435- result |= inv_icm20948_write_mems (pdev , ODR_CNTR_QUAT9 , 2 , (const unsigned char * )& odr_count_zero );
1436- }
1437- if ((delta & DMP_Data_Output_Control_1_Quat6 ) > 0 )
1438- {
1439- result |= inv_icm20948_write_mems (pdev , ODR_QUAT6 , 2 , (const unsigned char * )& odr_reg_val );
1440- result |= inv_icm20948_write_mems (pdev , ODR_CNTR_QUAT6 , 2 , (const unsigned char * )& odr_count_zero );
1441- }
1442- if ((delta & DMP_Data_Output_Control_1_ALS ) > 0 )
1443- {
1444- result |= inv_icm20948_write_mems (pdev , ODR_ALS , 2 , (const unsigned char * )& odr_reg_val );
1445- result |= inv_icm20948_write_mems (pdev , ODR_CNTR_ALS , 2 , (const unsigned char * )& odr_count_zero );
1446- }
1447- if ((delta & DMP_Data_Output_Control_1_Compass ) > 0 )
1448- {
1449- result |= inv_icm20948_write_mems (pdev , ODR_CPASS , 2 , (const unsigned char * )& odr_reg_val );
1450- result |= inv_icm20948_write_mems (pdev , ODR_CNTR_CPASS , 2 , (const unsigned char * )& odr_count_zero );
1451- }
1452- if ((delta & DMP_Data_Output_Control_1_Gyro ) > 0 )
1401+ switch (odr_reg )
14531402 {
1454- result |= inv_icm20948_write_mems (pdev , ODR_GYRO , 2 , (const unsigned char * )& odr_reg_val );
1455- result |= inv_icm20948_write_mems (pdev , ODR_CNTR_GYRO , 2 , (const unsigned char * )& odr_count_zero );
1456- }
1457- if ((delta & DMP_Data_Output_Control_1_Accel ) > 0 )
1458- {
1459- result |= inv_icm20948_write_mems (pdev , ODR_ACCEL , 2 , (const unsigned char * )& odr_reg_val );
1460- result |= inv_icm20948_write_mems (pdev , ODR_CNTR_ACCEL , 2 , (const unsigned char * )& odr_count_zero );
1403+ case DMP_ODR_Reg_Cpass_Calibr :
1404+ {
1405+ result = inv_icm20948_write_mems (pdev , ODR_CPASS_CALIBR , 2 , (const unsigned char * )& odr_reg_val );
1406+ result2 = inv_icm20948_write_mems (pdev , ODR_CNTR_CPASS_CALIBR , 2 , (const unsigned char * )& odr_count_zero );
1407+ }
1408+ break ;
1409+ case DMP_ODR_Reg_Gyro_Calibr :
1410+ {
1411+ result = inv_icm20948_write_mems (pdev , ODR_GYRO_CALIBR , 2 , (const unsigned char * )& odr_reg_val );
1412+ result2 = inv_icm20948_write_mems (pdev , ODR_CNTR_GYRO_CALIBR , 2 , (const unsigned char * )& odr_count_zero );
1413+ }
1414+ break ;
1415+ case DMP_ODR_Reg_Pressure :
1416+ {
1417+ result = inv_icm20948_write_mems (pdev , ODR_PRESSURE , 2 , (const unsigned char * )& odr_reg_val );
1418+ result2 = inv_icm20948_write_mems (pdev , ODR_CNTR_PRESSURE , 2 , (const unsigned char * )& odr_count_zero );
1419+ }
1420+ break ;
1421+ case DMP_ODR_Reg_Geomag :
1422+ {
1423+ result = inv_icm20948_write_mems (pdev , ODR_GEOMAG , 2 , (const unsigned char * )& odr_reg_val );
1424+ result2 = inv_icm20948_write_mems (pdev , ODR_CNTR_GEOMAG , 2 , (const unsigned char * )& odr_count_zero );
1425+ }
1426+ break ;
1427+ case DMP_ODR_Reg_PQuat6 :
1428+ {
1429+ result = inv_icm20948_write_mems (pdev , ODR_PQUAT6 , 2 , (const unsigned char * )& odr_reg_val );
1430+ result2 = inv_icm20948_write_mems (pdev , ODR_CNTR_PQUAT6 , 2 , (const unsigned char * )& odr_count_zero );
1431+ }
1432+ break ;
1433+ case DMP_ODR_Reg_Quat9 :
1434+ {
1435+ result = inv_icm20948_write_mems (pdev , ODR_QUAT9 , 2 , (const unsigned char * )& odr_reg_val );
1436+ result2 = inv_icm20948_write_mems (pdev , ODR_CNTR_QUAT9 , 2 , (const unsigned char * )& odr_count_zero );
1437+ }
1438+ break ;
1439+ case DMP_ODR_Reg_Quat6 :
1440+ {
1441+ result = inv_icm20948_write_mems (pdev , ODR_QUAT6 , 2 , (const unsigned char * )& odr_reg_val );
1442+ result2 = inv_icm20948_write_mems (pdev , ODR_CNTR_QUAT6 , 2 , (const unsigned char * )& odr_count_zero );
1443+ }
1444+ break ;
1445+ case DMP_ODR_Reg_ALS :
1446+ {
1447+ result = inv_icm20948_write_mems (pdev , ODR_ALS , 2 , (const unsigned char * )& odr_reg_val );
1448+ result2 = inv_icm20948_write_mems (pdev , ODR_CNTR_ALS , 2 , (const unsigned char * )& odr_count_zero );
1449+ }
1450+ break ;
1451+ case DMP_ODR_Reg_Cpass :
1452+ {
1453+ result = inv_icm20948_write_mems (pdev , ODR_CPASS , 2 , (const unsigned char * )& odr_reg_val );
1454+ result2 = inv_icm20948_write_mems (pdev , ODR_CNTR_CPASS , 2 , (const unsigned char * )& odr_count_zero );
1455+ }
1456+ break ;
1457+ case DMP_ODR_Reg_Gyro :
1458+ {
1459+ result = inv_icm20948_write_mems (pdev , ODR_GYRO , 2 , (const unsigned char * )& odr_reg_val );
1460+ result2 = inv_icm20948_write_mems (pdev , ODR_CNTR_GYRO , 2 , (const unsigned char * )& odr_count_zero );
1461+ }
1462+ break ;
1463+ case DMP_ODR_Reg_Accel :
1464+ {
1465+ result = inv_icm20948_write_mems (pdev , ODR_ACCEL , 2 , (const unsigned char * )& odr_reg_val );
1466+ result2 = inv_icm20948_write_mems (pdev , ODR_CNTR_ACCEL , 2 , (const unsigned char * )& odr_count_zero );
1467+ }
1468+ break ;
1469+ default :
1470+ result = ICM_20948_Stat_InvalDMPRegister ;
1471+ break ;
14611472 }
14621473
14631474 // result = ICM_20948_low_power(pdev, true); // Put chip into low power state
14641475 // if (result != ICM_20948_Stat_Ok)
14651476 // return result;
14661477
1478+ if (result2 > result )
1479+ result = result2 ; // Return the highest error
1480+
14671481 return result ;
14681482}
14691483
@@ -1526,7 +1540,7 @@ ICM_20948_Status_e inv_icm20948_enable_dmp_sensor_int(ICM_20948_Device_t *pdev,
15261540
15271541 if (state == 0 )
15281542 delta = 0 ;
1529-
1543+
15301544 unsigned char data_intr_ctl [2 ];
15311545
15321546 data_intr_ctl [0 ] = (unsigned char )(delta >> 8 );
0 commit comments