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PaulZCPaulZC
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Update ICM_20948_C.c
1 parent d5e82cb commit 75863db

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+31
-25
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+31
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‎src/util/ICM_20948_C.c‎

Lines changed: 31 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -1186,25 +1186,31 @@ ICM_20948_Status_e ICM_20948_set_dmp_start_address(ICM_20948_Device_t *pdev, uns
11861186
if (pdev->_dmp_firmware_available == false)
11871187
return ICM_20948_Stat_DMPNotSupported;
11881188

1189-
unsigned char data_output_control_reg1[2];
1189+
unsigned char start_address[2];
11901190

1191-
data_output_control_reg1[0] = (unsigned char)(address >> 8);
1192-
data_output_control_reg1[1] = (unsigned char)(address & 0xff);
1191+
start_address[0] = (unsigned char)(address >> 8);
1192+
start_address[1] = (unsigned char)(address & 0xff);
11931193

1194-
result = ICM_20948_sleep(pdev, false); // Make sure chip is awake
1195-
if (result != ICM_20948_Stat_Ok)
1196-
{
1197-
return result;
1198-
}
1194+
// result = ICM_20948_sleep(pdev, false); // Make sure chip is awake
1195+
// if (result != ICM_20948_Stat_Ok)
1196+
// {
1197+
// return result;
1198+
// }
1199+
//
1200+
// result = ICM_20948_low_power(pdev, false); // Make sure chip is not in low power state
1201+
// if (result != ICM_20948_Stat_Ok)
1202+
// {
1203+
// return result;
1204+
// }
11991205

1200-
result = ICM_20948_low_power(pdev, false); // Make sure chip is not in low power state
1206+
result = ICM_20948_set_bank(pdev, 2); // Set bank 2
12011207
if (result != ICM_20948_Stat_Ok)
12021208
{
12031209
return result;
12041210
}
12051211

12061212
// Write the sensor control bits into memory address AGB2_REG_PRGM_START_ADDRH
1207-
result = inv_icm20948_write_mems(pdev, AGB2_REG_PRGM_START_ADDRH, 2, (const unsigned char *)&data_output_control_reg1);
1213+
result = ICM_20948_execute_w(pdev, AGB2_REG_PRGM_START_ADDRH, (uint8_t *)start_address, 2);
12081214

12091215
return result;
12101216
}
@@ -1380,57 +1386,57 @@ ICM_20948_Status_e inv_icm20948_set_dmp_sensor_period(ICM_20948_Device_t *pdev,
13801386
}
13811387

13821388
// Set the ODR registers and clear the ODR counters
1383-
if (delta & DMP_Data_Output_Control_1_Compass_Calibr > 0)
1389+
if ((delta & DMP_Data_Output_Control_1_Compass_Calibr) > 0)
13841390
{
13851391
result |= inv_icm20948_write_mems(pdev, ODR_CPASS_CALIBR, 2, (const unsigned char *)&odr_reg_val);
13861392
result |= inv_icm20948_write_mems(pdev, ODR_CNTR_CPASS_CALIBR, 2, (const unsigned char *)&odr_count_zero);
13871393
}
1388-
if (delta & DMP_Data_Output_Control_1_Gyro_Calibr > 0)
1394+
if ((delta & DMP_Data_Output_Control_1_Gyro_Calibr) > 0)
13891395
{
13901396
result |= inv_icm20948_write_mems(pdev, ODR_GYRO_CALIBR, 2, (const unsigned char *)&odr_reg_val);
13911397
result |= inv_icm20948_write_mems(pdev, ODR_CNTR_GYRO_CALIBR, 2, (const unsigned char *)&odr_count_zero);
13921398
}
1393-
if (delta & DMP_Data_Output_Control_1_Pressure > 0)
1399+
if ((delta & DMP_Data_Output_Control_1_Pressure) > 0)
13941400
{
13951401
result |= inv_icm20948_write_mems(pdev, ODR_PRESSURE, 2, (const unsigned char *)&odr_reg_val);
13961402
result |= inv_icm20948_write_mems(pdev, ODR_CNTR_PRESSURE, 2, (const unsigned char *)&odr_count_zero);
13971403
}
1398-
if (delta & DMP_Data_Output_Control_1_Geomag > 0)
1404+
if ((delta & DMP_Data_Output_Control_1_Geomag) > 0)
13991405
{
14001406
result |= inv_icm20948_write_mems(pdev, ODR_GEOMAG, 2, (const unsigned char *)&odr_reg_val);
14011407
result |= inv_icm20948_write_mems(pdev, ODR_CNTR_GEOMAG, 2, (const unsigned char *)&odr_count_zero);
14021408
}
1403-
if (delta & DMP_Data_Output_Control_1_PQuat6 > 0)
1409+
if ((delta & DMP_Data_Output_Control_1_PQuat6) > 0)
14041410
{
14051411
result |= inv_icm20948_write_mems(pdev, ODR_PQUAT6, 2, (const unsigned char *)&odr_reg_val);
14061412
result |= inv_icm20948_write_mems(pdev, ODR_CNTR_PQUAT6, 2, (const unsigned char *)&odr_count_zero);
14071413
}
1408-
if (delta & DMP_Data_Output_Control_1_Quat9 > 0)
1414+
if ((delta & DMP_Data_Output_Control_1_Quat9) > 0)
14091415
{
14101416
result |= inv_icm20948_write_mems(pdev, ODR_QUAT9, 2, (const unsigned char *)&odr_reg_val);
14111417
result |= inv_icm20948_write_mems(pdev, ODR_CNTR_QUAT9, 2, (const unsigned char *)&odr_count_zero);
14121418
}
1413-
if (delta & DMP_Data_Output_Control_1_Quat6 > 0)
1419+
if ((delta & DMP_Data_Output_Control_1_Quat6) > 0)
14141420
{
14151421
result |= inv_icm20948_write_mems(pdev, ODR_QUAT6, 2, (const unsigned char *)&odr_reg_val);
14161422
result |= inv_icm20948_write_mems(pdev, ODR_CNTR_QUAT6, 2, (const unsigned char *)&odr_count_zero);
14171423
}
1418-
if (delta & DMP_Data_Output_Control_1_ALS > 0)
1424+
if ((delta & DMP_Data_Output_Control_1_ALS) > 0)
14191425
{
14201426
result |= inv_icm20948_write_mems(pdev, ODR_ALS, 2, (const unsigned char *)&odr_reg_val);
14211427
result |= inv_icm20948_write_mems(pdev, ODR_CNTR_ALS, 2, (const unsigned char *)&odr_count_zero);
14221428
}
1423-
if (delta & DMP_Data_Output_Control_1_Compass > 0)
1429+
if ((delta & DMP_Data_Output_Control_1_Compass) > 0)
14241430
{
14251431
result |= inv_icm20948_write_mems(pdev, ODR_CPASS, 2, (const unsigned char *)&odr_reg_val);
14261432
result |= inv_icm20948_write_mems(pdev, ODR_CNTR_CPASS, 2, (const unsigned char *)&odr_count_zero);
14271433
}
1428-
if (delta & DMP_Data_Output_Control_1_Gyro > 0)
1434+
if ((delta & DMP_Data_Output_Control_1_Gyro) > 0)
14291435
{
14301436
result |= inv_icm20948_write_mems(pdev, ODR_GYRO, 2, (const unsigned char *)&odr_reg_val);
14311437
result |= inv_icm20948_write_mems(pdev, ODR_CNTR_GYRO, 2, (const unsigned char *)&odr_count_zero);
14321438
}
1433-
if (delta & DMP_Data_Output_Control_1_Accel > 0)
1439+
if ((delta & DMP_Data_Output_Control_1_Accel) > 0)
14341440
{
14351441
result |= inv_icm20948_write_mems(pdev, ODR_ACCEL, 2, (const unsigned char *)&odr_reg_val);
14361442
result |= inv_icm20948_write_mems(pdev, ODR_CNTR_ACCEL, 2, (const unsigned char *)&odr_count_zero);
@@ -1502,10 +1508,10 @@ ICM_20948_Status_e inv_icm20948_enable_dmp_sensor_int(ICM_20948_Device_t *pdev,
15021508
if (delta == 0xFFFF)
15031509
return ICM_20948_Stat_SensorNotSupported;
15041510

1505-
unsigned char data_output_control_reg1[2];
1511+
unsigned char data_intr_ctl[2];
15061512

1507-
data_output_control_reg1[0] = (unsigned char)(delta >> 8);
1508-
data_output_control_reg1[1] = (unsigned char)(delta & 0xff);
1513+
data_intr_ctl[0] = (unsigned char)(delta >> 8);
1514+
data_intr_ctl[1] = (unsigned char)(delta & 0xff);
15091515

15101516
result = ICM_20948_sleep(pdev, false); // Make sure chip is awake
15111517
if (result != ICM_20948_Stat_Ok)
@@ -1520,7 +1526,7 @@ ICM_20948_Status_e inv_icm20948_enable_dmp_sensor_int(ICM_20948_Device_t *pdev,
15201526
}
15211527

15221528
// Write the sensor control bits into memory address DATA_OUT_CTL1
1523-
result = inv_icm20948_write_mems(pdev, DATA_INTR_CTL, 2, (const unsigned char *)&data_output_control_reg1);
1529+
result = inv_icm20948_write_mems(pdev, DATA_INTR_CTL, 2, (const unsigned char *)&data_intr_ctl);
15241530

15251531
// result = ICM_20948_low_power(pdev, true); // Put chip into low power state
15261532
// if (result != ICM_20948_Stat_Ok)

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