@@ -570,6 +570,31 @@ ICM_20948_Status_e ICM_20948::intEnableWatermarkFIFO(uint8_t bm_enable)
570570 return status;
571571}
572572
573+
574+ ICM_20948_Status_e ICM_20948::WOMThreshold (uint8_t threshold)
575+ {
576+ ICM_20948_ACCEL_WOM_THR_t thr; // storage
577+ status = ICM_20948_wom_threshold (&_device, NULL , &thr); // read phase
578+ if (status != ICM_20948_Stat_Ok)
579+ {
580+ return status;
581+ }
582+ thr.WOM_THRESHOLD = threshold; // change the setting
583+ status = ICM_20948_wom_threshold (&_device, &thr, &thr); // write phase w/ readback
584+ if (status != ICM_20948_Stat_Ok)
585+ {
586+ return status;
587+ }
588+ if (thr.WOM_THRESHOLD != threshold)
589+ {
590+ status = ICM_20948_Stat_Err;
591+ return status;
592+ }
593+ return status;
594+ }
595+
596+
597+
573598// Interface Options
574599ICM_20948_Status_e ICM_20948::i2cMasterPassthrough (bool passthrough)
575600{
@@ -1041,3 +1066,26 @@ ICM_20948_Status_e ICM_20948_read_SPI(uint8_t reg, uint8_t *buff, uint32_t len,
10411066
10421067 return ICM_20948_Stat_Ok;
10431068}
1069+ /*
1070+ ICM_20948_Status_e ICM_20948::WOMThreshold(uint8_t threshold)
1071+ {
1072+ ICM_20948_ACCEL_WOM_THR_t thr; // storage
1073+ status = ICM_20948_wom_threshold(&_device, NULL, &thr); // read phase
1074+ if (status != ICM_20948_Stat_Ok)
1075+ {
1076+ return status;
1077+ }
1078+ thr.WOM_THRESHOLD = threshold; // change the setting
1079+ status = ICM_20948_wom_threshold(&_device, &thr, &thr); // write phase w/ readback
1080+ if (status != ICM_20948_Stat_Ok)
1081+ {
1082+ return status;
1083+ }
1084+ if (thr.WOM_THRESHOLD != threshold)
1085+ {
1086+ status = ICM_20948_Stat_Err;
1087+ return status;
1088+ }
1089+ return status;
1090+ }
1091+ */
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