Update post reds review

Added SOT489
Move vias around so they don't interfere with silk
Change Barrel Jack voltage range.
Increase VUSB trace width.
Add silk to HSTX connector.
Panelize & CAM.

Author: SFE-Brudnerd

Hardware/Production/SparkFun_IoT_RedBoard-RP2350_panelized.GBL

@@ -1,12 +1,12 @@
 %TF.GenerationSoftware,KiCad,Pcbnew,8.0.6*%
-%TF.CreationDate,2025-02-05T17:53:08-07:00*%
+%TF.CreationDate,2025-02-07T12:31:58-07:00*%
 %TF.ProjectId,SparkFun_IoT_RedBoard-RP2350_panelized,53706172-6b46-4756-9e5f-496f545f5265,v10*%
 %TF.SameCoordinates,Original*%
 %TF.FileFunction,Soldermask,Bot*%
 %TF.FilePolarity,Negative*%
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 8.0.6) date 2025-02-05 17:53:08*
+G04 Created by KiCad (PCBNEW 8.0.6) date 2025-02-07 12:31:58*
 %MOMM*%
 %LPD*%
 G01*

Hardware/Production/SparkFun_IoT_RedBoard-RP2350_panelized.GBO

@@ -1,12 +1,12 @@
 %TF.GenerationSoftware,KiCad,Pcbnew,8.0.6*%
-%TF.CreationDate,2025-02-05T17:53:08-07:00*%
+%TF.CreationDate,2025-02-07T12:31:58-07:00*%
 %TF.ProjectId,SparkFun_IoT_RedBoard-RP2350_panelized,53706172-6b46-4756-9e5f-496f545f5265,v10*%
 %TF.SameCoordinates,Original*%
 %TF.FileFunction,Soldermask,Bot*%
 %TF.FilePolarity,Negative*%
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 8.0.6) date 2025-02-05 17:53:08*
+G04 Created by KiCad (PCBNEW 8.0.6) date 2025-02-07 12:31:58*
 %MOMM*%
 %LPD*%
 G01*