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| 1 | +/* |
| 2 | + * This file is part of the MicroPython project, http://micropython.org/ |
| 3 | + * |
| 4 | + * The MIT License (MIT) |
| 5 | + * |
| 6 | + * Copyright (c) 2025 Damien P. George |
| 7 | + * |
| 8 | + * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 9 | + * of this software and associated documentation files (the "Software"), to deal |
| 10 | + * in the Software without restriction, including without limitation the rights |
| 11 | + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 12 | + * copies of the Software, and to permit persons to whom the Software is |
| 13 | + * furnished to do so, subject to the following conditions: |
| 14 | + * |
| 15 | + * The above copyright notice and this permission notice shall be included in |
| 16 | + * all copies or substantial portions of the Software. |
| 17 | + * |
| 18 | + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 19 | + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 20 | + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 21 | + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 22 | + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 23 | + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 24 | + * THE SOFTWARE. |
| 25 | + */ |
| 26 | + |
| 27 | +// This file is never compiled standalone, it's included directly from |
| 28 | +// extmod/machine_i2c_target.c via MICROPY_PY_MACHINE_I2C_TARGET_INCLUDEFILE. |
| 29 | + |
| 30 | +#include <zephyr/drivers/i2c.h> |
| 31 | + |
| 32 | +#include "zephyr_device.h" |
| 33 | + |
| 34 | +typedef struct _machine_i2c_target_obj_t { |
| 35 | + mp_obj_base_t base; |
| 36 | + const struct device *dev; |
| 37 | + struct i2c_target_config cfg; |
| 38 | + uint8_t state; |
| 39 | + uint8_t data_byte; |
| 40 | +} machine_i2c_target_obj_t; |
| 41 | + |
| 42 | +static machine_i2c_target_obj_t machine_i2c_target_obj[] = { |
| 43 | + {.base = {&machine_i2c_target_type}, .dev = NULL}, |
| 44 | +}; |
| 45 | + |
| 46 | +/******************************************************************************/ |
| 47 | +// zephyr bindings |
| 48 | +// |
| 49 | +// Note that it's possible to get callbacks in either of these sequences: |
| 50 | +// - read_requested read_processed read_processed ... (eg STM32) |
| 51 | +// - read_requested read_processed read_requested read_processed ... (eg RP2xxx / Design Ware) |
| 52 | + |
| 53 | +static int i2c_target_write_requested(struct i2c_target_config *config) { |
| 54 | + machine_i2c_target_obj_t *self = CONTAINER_OF(config, machine_i2c_target_obj_t, cfg); |
| 55 | + self->state = STATE_WRITING; |
| 56 | + machine_i2c_target_data_addr_match(&machine_i2c_target_data[0], false); |
| 57 | + return 0; |
| 58 | +} |
| 59 | + |
| 60 | +static int i2c_target_write_received(struct i2c_target_config *config, uint8_t val) { |
| 61 | + machine_i2c_target_obj_t *self = CONTAINER_OF(config, machine_i2c_target_obj_t, cfg); |
| 62 | + machine_i2c_target_data_t *data = &machine_i2c_target_data[0]; |
| 63 | + self->data_byte = val; |
| 64 | + machine_i2c_target_data_write_request(self, data); |
| 65 | + return 0; |
| 66 | +} |
| 67 | + |
| 68 | +static int i2c_target_read_requested(struct i2c_target_config *config, uint8_t *val) { |
| 69 | + machine_i2c_target_obj_t *self = CONTAINER_OF(config, machine_i2c_target_obj_t, cfg); |
| 70 | + machine_i2c_target_data_t *data = &machine_i2c_target_data[0]; |
| 71 | + if (self->state != STATE_READING) { |
| 72 | + machine_i2c_target_data_addr_match(data, true); |
| 73 | + machine_i2c_target_data_read_request(self, data); |
| 74 | + self->state = STATE_READING; |
| 75 | + } |
| 76 | + *val = self->data_byte; |
| 77 | + return 0; |
| 78 | +} |
| 79 | + |
| 80 | +static int i2c_target_read_processed(struct i2c_target_config *config, uint8_t *val) { |
| 81 | + machine_i2c_target_obj_t *self = CONTAINER_OF(config, machine_i2c_target_obj_t, cfg); |
| 82 | + machine_i2c_target_data_t *data = &machine_i2c_target_data[0]; |
| 83 | + machine_i2c_target_data_read_request(self, data); |
| 84 | + *val = self->data_byte; |
| 85 | + return 0; |
| 86 | +} |
| 87 | + |
| 88 | +// called only on stop, not restart |
| 89 | +static int i2c_target_stop(struct i2c_target_config *config) { |
| 90 | + machine_i2c_target_obj_t *self = CONTAINER_OF(config, machine_i2c_target_obj_t, cfg); |
| 91 | + if (self->state == STATE_IDLE) { |
| 92 | + // Assume a stop without a start is a 0-byte write. |
| 93 | + machine_i2c_target_data_addr_match(&machine_i2c_target_data[0], false); |
| 94 | + } |
| 95 | + self->state = STATE_IDLE; |
| 96 | + machine_i2c_target_data_t *data = &machine_i2c_target_data[0]; |
| 97 | + machine_i2c_target_data_stop(data); |
| 98 | + return 0; |
| 99 | +} |
| 100 | + |
| 101 | +static struct i2c_target_callbacks i2c_target_callbacks = { |
| 102 | + .write_requested = i2c_target_write_requested, |
| 103 | + .read_requested = i2c_target_read_requested, |
| 104 | + .write_received = i2c_target_write_received, |
| 105 | + .read_processed = i2c_target_read_processed, |
| 106 | + .stop = i2c_target_stop, |
| 107 | +}; |
| 108 | + |
| 109 | +/******************************************************************************/ |
| 110 | +// I2CTarget port implementation |
| 111 | + |
| 112 | +static inline size_t mp_machine_i2c_target_get_index(machine_i2c_target_obj_t *self) { |
| 113 | + return 0; |
| 114 | +} |
| 115 | + |
| 116 | +static void mp_machine_i2c_target_event_callback(machine_i2c_target_irq_obj_t *irq) { |
| 117 | + char dummy; |
| 118 | + void *orig_top = MP_STATE_THREAD(stack_top); |
| 119 | + mp_uint_t orig_limit = MP_STATE_THREAD(stack_limit); |
| 120 | + MP_STATE_THREAD(stack_top) = &dummy; |
| 121 | + MP_STATE_THREAD(stack_limit) = CONFIG_ISR_STACK_SIZE - 512; |
| 122 | + mp_irq_handler(&irq->base); |
| 123 | + MP_STATE_THREAD(stack_top) = orig_top; |
| 124 | + MP_STATE_THREAD(stack_limit) = orig_limit; |
| 125 | +} |
| 126 | + |
| 127 | +static size_t mp_machine_i2c_target_read_bytes(machine_i2c_target_obj_t *self, size_t len, uint8_t *buf) { |
| 128 | + buf[0] = self->data_byte; |
| 129 | + return 1; |
| 130 | +} |
| 131 | + |
| 132 | +static size_t mp_machine_i2c_target_write_bytes(machine_i2c_target_obj_t *self, size_t len, const uint8_t *buf) { |
| 133 | + self->data_byte = buf[0]; |
| 134 | + return 1; |
| 135 | +} |
| 136 | + |
| 137 | +static inline void mp_machine_i2c_target_irq_config(machine_i2c_target_obj_t *self, unsigned int trigger) { |
| 138 | + (void)self; |
| 139 | + (void)trigger; |
| 140 | +} |
| 141 | + |
| 142 | +static mp_obj_t mp_machine_i2c_target_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) { |
| 143 | + enum { ARG_id, ARG_addr, ARG_addrsize, ARG_mem, ARG_mem_addrsize, ARG_scl, ARG_sda }; |
| 144 | + static const mp_arg_t allowed_args[] = { |
| 145 | + { MP_QSTR_id, MP_ARG_REQUIRED | MP_ARG_OBJ }, |
| 146 | + { MP_QSTR_addr, MP_ARG_REQUIRED | MP_ARG_INT }, |
| 147 | + { MP_QSTR_addrsize, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 7} }, |
| 148 | + { MP_QSTR_mem, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} }, |
| 149 | + { MP_QSTR_mem_addrsize, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, |
| 150 | + }; |
| 151 | + |
| 152 | + // Parse arguments. |
| 153 | + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; |
| 154 | + mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); |
| 155 | + |
| 156 | + const struct device *dev = zephyr_device_find(args[ARG_id].u_obj); |
| 157 | + |
| 158 | + machine_i2c_target_obj_t *self = &machine_i2c_target_obj[0]; |
| 159 | + if (!(self->dev == NULL || self->dev == dev)) { |
| 160 | + mp_raise_ValueError(MP_ERROR_TEXT("only one I2CTarget supported")); |
| 161 | + } |
| 162 | + self->dev = dev; |
| 163 | + self->cfg.flags = 0; |
| 164 | + self->cfg.address = args[ARG_addr].u_int; |
| 165 | + self->cfg.callbacks = &i2c_target_callbacks; |
| 166 | + |
| 167 | + // Initialise data. |
| 168 | + self->state = STATE_IDLE; |
| 169 | + MP_STATE_PORT(machine_i2c_target_mem_obj)[0] = args[ARG_mem].u_obj; |
| 170 | + machine_i2c_target_data_t *data = &machine_i2c_target_data[0]; |
| 171 | + machine_i2c_target_data_init(data, args[ARG_mem].u_obj, args[ARG_mem_addrsize].u_int); |
| 172 | + |
| 173 | + // Initialise the I2C target. |
| 174 | + int ret = i2c_target_register(self->dev, &self->cfg); |
| 175 | + if (ret < 0) { |
| 176 | + mp_raise_OSError(-ret); |
| 177 | + } |
| 178 | + |
| 179 | + return MP_OBJ_FROM_PTR(self); |
| 180 | +} |
| 181 | + |
| 182 | +static void mp_machine_i2c_target_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { |
| 183 | + machine_i2c_target_obj_t *self = MP_OBJ_TO_PTR(self_in); |
| 184 | + mp_printf(print, "I2CTarget(%s, addr=%u)", |
| 185 | + self->dev == NULL ? "" : self->dev->name, self->cfg.address); |
| 186 | +} |
| 187 | + |
| 188 | +static void mp_machine_i2c_target_deinit(machine_i2c_target_obj_t *self) { |
| 189 | + i2c_target_unregister(self->dev, &self->cfg); |
| 190 | + self->dev = NULL; |
| 191 | +} |
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