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tests/multi_extmod: Add I2CTarget multi tests.
These require two boards wired together, SCL-SCL and SDA-SDA. Signed-off-by: Damien George <[email protected]>
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‎tests/multi_extmod/machine_i2c_target_irq.py

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# Test I2CTarget IRQs and clock stretching.
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#
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# Requires two instances with their SCL and SDA lines connected together.
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# Any combination of the below supported boards can be used.
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#
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# Notes:
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# - pull-up resistors may be needed
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# - alif use 1.8V signalling
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import sys
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import time
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from machine import I2C, I2CTarget
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if not hasattr(I2CTarget, "IRQ_ADDR_MATCH_READ"):
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print("SKIP")
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raise SystemExit
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ADDR = 67
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clock_stretch_us = 200
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# Configure pins based on the target.
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if sys.platform == "alif":
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i2c_args = (1,) # pins P3_7/P3_6
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i2c_kwargs = {}
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elif sys.platform == "mimxrt":
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i2c_args = (0,) # pins 19/18 on Teensy 4.x
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i2c_kwargs = {}
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clock_stretch_us = 50 # mimxrt cannot delay too long in the IRQ handler
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elif sys.platform == "rp2":
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i2c_args = (0,)
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i2c_kwargs = {"scl": 9, "sda": 8}
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elif sys.platform == "pyboard":
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i2c_args = ("Y",)
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i2c_kwargs = {}
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elif sys.platform == "samd":
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i2c_args = () # pins SCL/SDA
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i2c_kwargs = {}
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elif "zephyr-rpi_pico" in sys.implementation._machine:
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i2c_args = ("i2c1",) # on gpio7/gpio6
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i2c_kwargs = {}
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else:
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print("Please add support for this test on this platform.")
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raise SystemExit
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def simple_irq(i2c_target):
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flags = i2c_target.irq().flags()
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if flags & I2CTarget.IRQ_ADDR_MATCH_READ:
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print("IRQ_ADDR_MATCH_READ")
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if flags & I2CTarget.IRQ_ADDR_MATCH_WRITE:
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print("IRQ_ADDR_MATCH_WRITE")
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# Force clock stretching.
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time.sleep_us(clock_stretch_us)
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class I2CTargetMemory:
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def __init__(self, i2c_target, mem):
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self.buf1 = bytearray(1)
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self.mem = mem
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self.memaddr = 0
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self.state = 0
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i2c_target.irq(
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self.irq,
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I2CTarget.IRQ_ADDR_MATCH_WRITE | I2CTarget.IRQ_READ_REQ | I2CTarget.IRQ_WRITE_REQ,
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hard=True,
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)
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def irq(self, i2c_target):
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# Force clock stretching.
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time.sleep_us(clock_stretch_us)
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flags = i2c_target.irq().flags()
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if flags & I2CTarget.IRQ_ADDR_MATCH_WRITE:
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self.state = 0
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if flags & I2CTarget.IRQ_READ_REQ:
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self.buf1[0] = self.mem[self.memaddr]
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self.memaddr += 1
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i2c_target.write(self.buf1)
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if flags & I2CTarget.IRQ_WRITE_REQ:
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i2c_target.readinto(self.buf1)
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if self.state == 0:
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self.state = 1
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self.memaddr = self.buf1[0]
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else:
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self.mem[self.memaddr] = self.buf1[0]
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self.memaddr += 1
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self.memaddr %= len(self.mem)
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# Force clock stretching.
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time.sleep_us(clock_stretch_us)
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# I2C controller
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def instance0():
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i2c = I2C(*i2c_args, **i2c_kwargs)
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multitest.next()
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for iteration in range(2):
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print("controller iteration", iteration)
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multitest.wait("target stage 1")
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i2c.writeto_mem(ADDR, 2, "0123")
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multitest.broadcast("controller stage 2")
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multitest.wait("target stage 3")
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print(i2c.readfrom_mem(ADDR, 2, 4))
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multitest.broadcast("controller stage 4")
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print("done")
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# I2C target
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def instance1():
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multitest.next()
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for iteration in range(2):
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print("target iteration", iteration)
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buf = bytearray(b"--------")
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if iteration == 0:
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# Use built-in memory capability of I2CTarget.
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i2c_target = I2CTarget(*i2c_args, **i2c_kwargs, addr=ADDR, mem=buf)
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i2c_target.irq(
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simple_irq,
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I2CTarget.IRQ_ADDR_MATCH_READ | I2CTarget.IRQ_ADDR_MATCH_WRITE,
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hard=True,
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)
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else:
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# Implement a memory device by hand.
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i2c_target = I2CTarget(*i2c_args, **i2c_kwargs, addr=ADDR)
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I2CTargetMemory(i2c_target, buf)
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multitest.broadcast("target stage 1")
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multitest.wait("controller stage 2")
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print(buf)
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multitest.broadcast("target stage 3")
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multitest.wait("controller stage 4")
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i2c_target.deinit()
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print("done")

‎tests/multi_extmod/machine_i2c_target_irq.py.exp

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--- instance0 ---
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controller iteration 0
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b'0123'
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controller iteration 1
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b'0123'
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done
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--- instance1 ---
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target iteration 0
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IRQ_ADDR_MATCH_WRITE
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bytearray(b'--0123--')
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IRQ_ADDR_MATCH_WRITE
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IRQ_ADDR_MATCH_READ
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target iteration 1
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bytearray(b'--0123--')
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done

‎tests/multi_extmod/machine_i2c_target_memory.py

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# Test basic use of I2CTarget and a memory buffer.
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#
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# Requires two instances with their SCL and SDA lines connected together.
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# Any combination of the below supported boards can be used.
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#
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# Notes:
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# - pull-up resistors may be needed
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# - alif use 1.8V signalling
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import sys
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from machine import I2C, I2CTarget
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ADDR = 67
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# Configure pins based on the target.
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if sys.platform == "alif":
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i2c_args = (1,) # pins P3_7/P3_6
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i2c_kwargs = {}
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elif sys.platform == "esp32":
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i2c_args = (1,) # on pins 9/8
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i2c_kwargs = {}
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elif sys.platform == "mimxrt":
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i2c_args = (0,) # pins 19/18 on Teensy 4.x
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i2c_kwargs = {}
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elif sys.platform == "rp2":
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i2c_args = (0,)
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i2c_kwargs = {"scl": 9, "sda": 8}
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elif sys.platform == "pyboard":
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i2c_args = ("Y",)
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i2c_kwargs = {}
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elif sys.platform == "samd":
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i2c_args = () # pins SCL/SDA
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i2c_kwargs = {}
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elif "zephyr-rpi_pico" in sys.implementation._machine:
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i2c_args = ("i2c1",) # on gpio7/gpio6
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i2c_kwargs = {}
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else:
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print("Please add support for this test on this platform.")
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raise SystemExit
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def simple_irq(i2c_target):
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flags = i2c_target.irq().flags()
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if flags & I2CTarget.IRQ_END_READ:
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print("IRQ_END_READ", i2c_target.memaddr)
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if flags & I2CTarget.IRQ_END_WRITE:
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print("IRQ_END_WRITE", i2c_target.memaddr)
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# I2C controller
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def instance0():
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i2c = I2C(*i2c_args, **i2c_kwargs)
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multitest.next()
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for iteration in range(2):
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print("controller iteration", iteration)
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multitest.wait("target stage 1")
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i2c.writeto_mem(ADDR, 2 + iteration, "0123")
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multitest.broadcast("controller stage 2")
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multitest.wait("target stage 3")
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print(i2c.readfrom_mem(ADDR, 2 + iteration, 4))
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multitest.broadcast("controller stage 4")
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print("done")
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# I2C target
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def instance1():
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buf = bytearray(b"--------")
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i2c_target = I2CTarget(*i2c_args, **i2c_kwargs, addr=ADDR, mem=buf)
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i2c_target.irq(simple_irq)
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multitest.next()
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for iteration in range(2):
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print("target iteration", iteration)
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multitest.broadcast("target stage 1")
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multitest.wait("controller stage 2")
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print(buf)
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multitest.broadcast("target stage 3")
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multitest.wait("controller stage 4")
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i2c_target.deinit()
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print("done")

‎tests/multi_extmod/machine_i2c_target_memory.py.exp

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--- instance0 ---
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controller iteration 0
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b'0123'
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controller iteration 1
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b'0123'
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done
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--- instance1 ---
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target iteration 0
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IRQ_END_WRITE 2
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bytearray(b'--0123--')
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IRQ_END_READ 2
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target iteration 1
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IRQ_END_WRITE 3
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bytearray(b'--00123-')
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IRQ_END_READ 3
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done

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