107107
108108#define PHY_INIT_TIMEOUT_MS (10000)
109109
110- #define RX_BUF_SIZE (1524) // includes 4-byte CRC at end
111- #define TX_BUF_SIZE (1524)
110+ // These buffer sizes need to be a multiple of 8 (for STM32N6 at least).
111+ #define RX_BUF_SIZE (1528) // includes 4-byte CRC at end
112+ #define TX_BUF_SIZE (1528)
112113
113114#define RX_BUF_NUM (5)
114115#define TX_BUF_NUM (5)
@@ -130,11 +131,17 @@ typedef struct _eth_dma_tx_descr_t {
130131typedef struct _eth_dma_t {
131132 eth_dma_rx_descr_t rx_descr [RX_BUF_NUM ];
132133 eth_dma_tx_descr_t tx_descr [TX_BUF_NUM ];
133- uint8_t rx_buf [RX_BUF_NUM * RX_BUF_SIZE ] __attribute__((aligned (4 )));
134- uint8_t tx_buf [TX_BUF_NUM * TX_BUF_SIZE ] __attribute__((aligned (4 )));
134+ uint8_t rx_buf [RX_BUF_NUM * RX_BUF_SIZE ] __attribute__((aligned (8 )));
135+ uint8_t tx_buf [TX_BUF_NUM * TX_BUF_SIZE ] __attribute__((aligned (8 )));
135136 size_t rx_descr_idx ;
136137 size_t tx_descr_idx ;
137- uint8_t padding [16384 - 15408 ];
138+ // Make sure the size of this struct is 16k, for the MPU.
139+ uint8_t padding [16 * 1024
140+ - sizeof (eth_dma_rx_descr_t ) * RX_BUF_NUM
141+ - sizeof (eth_dma_tx_descr_t ) * TX_BUF_NUM
142+ - RX_BUF_NUM * RX_BUF_SIZE
143+ - TX_BUF_NUM * TX_BUF_SIZE
144+ - sizeof (size_t ) * 2 ];
138145} eth_dma_t ;
139146
140147typedef struct _eth_t {
@@ -210,6 +217,8 @@ uint32_t eth_phy_read(uint32_t phy_addr, uint32_t reg) {
210217}
211218
212219int eth_init (eth_t * self , int mac_idx , uint32_t phy_addr , int phy_type ) {
220+ MP_STATIC_ASSERT (sizeof (eth_dma_t ) == 16 * 1024 );
221+
213222 mp_hal_get_mac (mac_idx , & self -> netif .hwaddr [0 ]);
214223 self -> netif .hwaddr_len = 6 ;
215224 self -> phy_addr = phy_addr ;
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