rp2: Support for dynamic pins.

Support configuring wireless on arbitrary GPIO pins.

e.g.

import network
wlan = network.WLAN(network.STA_IF, pin_on=2, pin_cs=3, pin_dat=4,
pin_clock=5, div_int=3)

Signed-off-by: Peter Harper <[email protected]>

Author: peterharperuk

ports/rp2/CMakeLists.txt

@@ -195,6 +195,12 @@ set(MICROPY_SOURCE_QSTR
     ${CMAKE_BINARY_DIR}/pins_${MICROPY_BOARD}.c
 )
 
+if (MICROPY_PY_NETWORK_CYW43)
+    list(APPEND MICROPY_SOURCE_QSTR
+        ${MICROPY_PORT_DIR}/rp2_network_cyw43.c
+    )
+endif()
+
 set(PICO_SDK_COMPONENTS
     boot_bootrom_headers
     hardware_adc
@@ -403,6 +409,7 @@ if (MICROPY_PY_NETWORK_CYW43)
 
     list(APPEND MICROPY_SOURCE_PORT
         machine_pin_cyw43.c
+        rp2_network_cyw43.c
     )
 
     target_link_libraries(${MICROPY_TARGET}

ports/rp2/mpconfigport.h

@@ -223,6 +223,10 @@ extern const struct _mp_obj_type_t mp_network_cyw43_type;
     { MP_ROM_QSTR(MP_QSTR_STAT_NO_AP_FOUND), MP_ROM_INT(CYW43_LINK_NONET) }, \
     { MP_ROM_QSTR(MP_QSTR_STAT_CONNECT_FAIL), MP_ROM_INT(CYW43_LINK_FAIL) }, \
     { MP_ROM_QSTR(MP_QSTR_STAT_GOT_IP), MP_ROM_INT(CYW43_LINK_UP) },
+
+// Override network_cyw43_make_new
+#define MICROPY_PY_NETWORK_CYW43_MAKE_NEW rp2_network_cyw43_make_new
+
 #else
 #define MICROPY_HW_NIC_CYW43
 #endif

ports/rp2/mpnetworkport.c

@@ -77,6 +77,10 @@ void cyw43_irq_init(void) {
     NVIC_SetPriority(PendSV_IRQn, IRQ_PRI_PENDSV);
 }
 
+void cyw43_irq_deinit(void) {
+    gpio_remove_raw_irq_handler(CYW43_PIN_WL_HOST_WAKE, gpio_irq_handler);
+}
+
 void cyw43_post_poll_hook(void) {
     cyw43_has_pending = 0;
     gpio_set_irq_enabled(CYW43_PIN_WL_HOST_WAKE, CYW43_IRQ_LEVEL, true);

ports/rp2/rp2_network_cyw43.c

@@ -0,0 +1,70 @@
+#include "py/runtime.h"
+#include "extmod/network_cyw43.h"
+#include "extmod/modnetwork.h"
+#include "lib/cyw43-driver/src/cyw43.h"
+
+void cyw43_irq_deinit(void);
+void cyw43_irq_init(void);
+
+#if CYW43_PIN_WL_DYNAMIC
+// Defined in cyw43_bus_pio_spi.c
+extern int cyw43_set_pins_wl(uint pins[CYW43_PIN_INDEX_WL_COUNT]);
+#endif
+
+#if CYW43_PIO_CLOCK_DIV_DYNAMIC
+// Defined in cyw43_bus_pio_spi.c
+extern void cyw43_set_pio_clock_divisor(uint16_t clock_div_int, uint8_t clock_div_frac);
+#endif
+
+mp_obj_t rp2_network_cyw43_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
+    enum { ARG_interface, ARG_pin_on, ARG_pin_out, ARG_pin_in, ARG_pin_wake, ARG_pin_clock, ARG_pin_cs, ARG_pin_dat, ARG_div_int, ARG_div_frac };
+    static const mp_arg_t allowed_args[] = {
+        { MP_QSTR_interface, MP_ARG_INT, {.u_int = MOD_NETWORK_STA_IF} },
+        #if CYW43_PIN_WL_DYNAMIC
+        { MP_QSTR_pin_on, MP_ARG_KW_ONLY | MP_ARG_OBJ, { .u_obj = MP_OBJ_NULL } },
+        { MP_QSTR_pin_out, MP_ARG_KW_ONLY | MP_ARG_OBJ, { .u_obj = MP_OBJ_NULL } },
+        { MP_QSTR_pin_in, MP_ARG_KW_ONLY | MP_ARG_OBJ, { .u_obj = MP_OBJ_NULL } },
+        { MP_QSTR_pin_wake, MP_ARG_KW_ONLY | MP_ARG_OBJ, { .u_obj = MP_OBJ_NULL } },
+        { MP_QSTR_pin_clock, MP_ARG_KW_ONLY | MP_ARG_OBJ, { .u_obj = MP_OBJ_NULL } },
+        { MP_QSTR_pin_cs, MP_ARG_KW_ONLY | MP_ARG_OBJ, { .u_obj = MP_OBJ_NULL } },
+        { MP_QSTR_pin_dat, MP_ARG_KW_ONLY | MP_ARG_OBJ, { .u_obj = MP_OBJ_NULL } },
+        #endif
+        #if CYW43_PIO_CLOCK_DIV_DYNAMIC
+        { MP_QSTR_div_int, MP_ARG_KW_ONLY | MP_ARG_INT, { .u_int = 0 } },
+        { MP_QSTR_div_frac, MP_ARG_KW_ONLY | MP_ARG_INT, { .u_int = 0 } },
+        #endif
+    };
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
+
+    // Set the pins
+    #if CYW43_PIN_WL_DYNAMIC
+    #define SET_PIN_ARG(ARG_ENUM, DEFAULT) args[ARG_ENUM].u_obj != MP_OBJ_NULL ? mp_hal_get_pin_obj(args[ARG_ENUM].u_obj) : (DEFAULT)
+    uint pins[CYW43_PIN_INDEX_WL_COUNT] = {
+        SET_PIN_ARG(ARG_pin_on, CYW43_DEFAULT_PIN_WL_REG_ON),
+        SET_PIN_ARG(ARG_pin_out, SET_PIN_ARG(ARG_pin_dat, CYW43_DEFAULT_PIN_WL_DATA_OUT)),
+        SET_PIN_ARG(ARG_pin_in, SET_PIN_ARG(ARG_pin_dat, CYW43_DEFAULT_PIN_WL_DATA_IN)),
+        SET_PIN_ARG(ARG_pin_wake, SET_PIN_ARG(ARG_pin_dat, CYW43_DEFAULT_PIN_WL_HOST_WAKE)),
+        SET_PIN_ARG(ARG_pin_clock, CYW43_DEFAULT_PIN_WL_CLOCK),
+        SET_PIN_ARG(ARG_pin_cs, CYW43_DEFAULT_PIN_WL_CS),
+    };
+
+    // re-initialise cyw43
+    cyw43_irq_deinit();
+    cyw43_set_pins_wl(pins);
+    cyw43_irq_init();
+    #endif
+
+    #if CYW43_PIO_CLOCK_DIV_DYNAMIC
+    // set the pio clock divisor
+    if (args[ARG_div_int].u_int > 0) {
+        cyw43_set_pio_clock_divisor((uint16_t)args[ARG_div_int].u_int, (uint16_t)args[ARG_div_frac].u_int);
+    }
+    #endif
+
+    if (n_args == 0 || mp_obj_get_int(all_args[ARG_interface]) == MOD_NETWORK_STA_IF) {
+        return network_cyw43_get_interface(MOD_NETWORK_STA_IF);
+    } else {
+        return network_cyw43_get_interface(MOD_NETWORK_AP_IF);
+    }
+}