@@ -358,13 +358,13 @@ Run WM8960 on a MIMXRT10xx_DEV board in secondary mode (default)::
358358 sysclk_source=wm8960.SYSCLK_MCLK)
359359
360360
361- Record with a Sparkfun WM8960 breakout board with Teensy in secondary mode (default)::
361+ Record with a SparkFun WM8960 breakout board with Teensy in secondary mode (default)::
362362
363363 # Micro_python WM8960 Codec driver
364364 #
365365 # The breakout board uses a fixed 24MHz MCLK. Therefore the internal
366366 # PLL must be used as sysclk, which is the master audio clock.
367- # The Sparkfun board has the WS pins for RX and TX connected on the
367+ # The SparkFun board has the WS pins for RX and TX connected on the
368368 # board. Therefore adc_sync must be set to sync_adc, to configure
369369 # it's ADCLRC pin as input.
370370 #
@@ -379,11 +379,11 @@ Record with a Sparkfun WM8960 breakout board with Teensy in secondary mode (defa
379379 right_input=wm8960.INPUT_CLOSED)
380380
381381
382- Play with a Sparkfun WM8960 breakout board with Teensy in secondary mode (default)::
382+ Play with a SparkFun WM8960 breakout board with Teensy in secondary mode (default)::
383383
384384 # The breakout board uses a fixed 24MHz MCLK. Therefore the internal
385385 # PLL must be used as sysclk, which is the master audio clock.
386- # The Sparkfun board has the WS pins for RX and TX connected on the
386+ # The SparkFun board has the WS pins for RX and TX connected on the
387387 # board. Therefore adc_sync must be set to sync_adc, to configure
388388 # it's ADCLRC pin as input.
389389
0 commit comments