Skip to content

Commit bf9cdd2

Browse files
dpgeorgedpgeorge
committed
stm32: Rename ROMFS partition config variables to start at index 0.
Change ROMFS partition configuration variables to use index 0 as the starting partition number (instead of index 1). Reasons to do this: - `vfs.rom_ioctl()` numbers the partitions starting from 0 - `mpremote romfs -p <partition id>` numbers the partitions starting from 0 Signed-off-by: Damien George <[email protected]>
1 parent 416c6cf commit bf9cdd2

File tree

6 files changed

+21
-21
lines changed

6 files changed

+21
-21
lines changed

‎ports/stm32/boards/PYBD_SF2/f722_qspi.ld‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -41,8 +41,8 @@ _heap_start = _ebss; /* heap starts just after statically allocated memory */
4141
_heap_end = _sstack;
4242

4343
/* ROMFS location */
44-
_micropy_hw_romfs_part1_start = ORIGIN(FLASH_ROMFS);
45-
_micropy_hw_romfs_part1_size = LENGTH(FLASH_ROMFS);
44+
_micropy_hw_romfs_part0_start = ORIGIN(FLASH_ROMFS);
45+
_micropy_hw_romfs_part0_size = LENGTH(FLASH_ROMFS);
4646

4747
/* Define output sections */
4848
SECTIONS

‎ports/stm32/boards/PYBD_SF2/mpconfigboard.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -67,7 +67,7 @@ void board_sleep(int value);
6767
// ROMFS config
6868
#define MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI (1)
6969
#define MICROPY_HW_ROMFS_QSPI_SPIFLASH_OBJ (&spi_bdev2.spiflash)
70-
#define MICROPY_HW_ROMFS_ENABLE_PART1 (1)
70+
#define MICROPY_HW_ROMFS_ENABLE_PART0 (1)
7171

7272
// SPI flash #1, for R/W storage
7373
#define MICROPY_HW_SOFTQSPI_SCK_LOW(self) (GPIOE->BSRR = (0x10000 << 11))

‎ports/stm32/boards/PYBD_SF6/f767.ld‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,7 @@ _heap_start = _ebss; /* heap starts just after statically allocated memory */
3838
_heap_end = _sstack;
3939

4040
/* ROMFS location */
41-
_micropy_hw_romfs_part1_start = ORIGIN(FLASH_ROMFS);
42-
_micropy_hw_romfs_part1_size = LENGTH(FLASH_ROMFS);
41+
_micropy_hw_romfs_part0_start = ORIGIN(FLASH_ROMFS);
42+
_micropy_hw_romfs_part0_size = LENGTH(FLASH_ROMFS);
4343

4444
INCLUDE common_bl.ld

‎ports/stm32/boards/PYBD_SF6/mpconfigboard.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -48,7 +48,7 @@
4848
// ROMFS config
4949
#define MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI (1)
5050
#define MICROPY_HW_ROMFS_QSPI_SPIFLASH_OBJ (&spi_bdev2.spiflash)
51-
#define MICROPY_HW_ROMFS_ENABLE_PART1 (1)
51+
#define MICROPY_HW_ROMFS_ENABLE_PART0 (1)
5252

5353
// Extra UART config
5454
#define MICROPY_HW_UART7_TX (pyb_pin_W16)

‎ports/stm32/mpconfigboard_common.h‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -77,16 +77,16 @@
7777
#define MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI (0)
7878
#endif
7979

80+
// Whether to enable ROMFS partition 0.
81+
#ifndef MICROPY_HW_ROMFS_ENABLE_PART0
82+
#define MICROPY_HW_ROMFS_ENABLE_PART0 (0)
83+
#endif
84+
8085
// Whether to enable ROMFS partition 1.
8186
#ifndef MICROPY_HW_ROMFS_ENABLE_PART1
8287
#define MICROPY_HW_ROMFS_ENABLE_PART1 (0)
8388
#endif
8489

85-
// Whether to enable ROMFS partition 2.
86-
#ifndef MICROPY_HW_ROMFS_ENABLE_PART2
87-
#define MICROPY_HW_ROMFS_ENABLE_PART2 (0)
88-
#endif
89-
9090
// Whether to enable storage on the internal flash of the MCU
9191
#ifndef MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE
9292
#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (1)

‎ports/stm32/vfs_rom_ioctl.c‎

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -36,29 +36,29 @@
3636

3737
#if MICROPY_VFS_ROM_IOCTL
3838

39+
#if MICROPY_HW_ROMFS_ENABLE_PART0 && !defined(MICROPY_HW_ROMFS_PART0_START)
40+
#define MICROPY_HW_ROMFS_PART0_START (uintptr_t)(&_micropy_hw_romfs_part0_start)
41+
#define MICROPY_HW_ROMFS_PART0_SIZE (uintptr_t)(&_micropy_hw_romfs_part0_size)
42+
extern uint8_t _micropy_hw_romfs_part0_start;
43+
extern uint8_t _micropy_hw_romfs_part0_size;
44+
#endif
45+
3946
#if MICROPY_HW_ROMFS_ENABLE_PART1 && !defined(MICROPY_HW_ROMFS_PART1_START)
4047
#define MICROPY_HW_ROMFS_PART1_START (uintptr_t)(&_micropy_hw_romfs_part1_start)
4148
#define MICROPY_HW_ROMFS_PART1_SIZE (uintptr_t)(&_micropy_hw_romfs_part1_size)
4249
extern uint8_t _micropy_hw_romfs_part1_start;
4350
extern uint8_t _micropy_hw_romfs_part1_size;
4451
#endif
4552

46-
#if MICROPY_HW_ROMFS_ENABLE_PART2 && !defined(MICROPY_HW_ROMFS_PART2_START)
47-
#define MICROPY_HW_ROMFS_PART2_START (uintptr_t)(&_micropy_hw_romfs_part2_start)
48-
#define MICROPY_HW_ROMFS_PART2_SIZE (uintptr_t)(&_micropy_hw_romfs_part2_size)
49-
extern uint8_t _micropy_hw_romfs_part2_start;
50-
extern uint8_t _micropy_hw_romfs_part2_size;
51-
#endif
52-
5353
#define ROMFS_MEMORYVIEW(base, size) {{&mp_type_memoryview}, 'B', 0, (size), (void *)(base)}
5454

5555
static const mp_obj_array_t romfs_obj_table[] = {
56+
#if MICROPY_HW_ROMFS_ENABLE_PART0
57+
ROMFS_MEMORYVIEW(MICROPY_HW_ROMFS_PART0_START, MICROPY_HW_ROMFS_PART0_SIZE),
58+
#endif
5659
#if MICROPY_HW_ROMFS_ENABLE_PART1
5760
ROMFS_MEMORYVIEW(MICROPY_HW_ROMFS_PART1_START, MICROPY_HW_ROMFS_PART1_SIZE),
5861
#endif
59-
#if MICROPY_HW_ROMFS_ENABLE_PART2
60-
ROMFS_MEMORYVIEW(MICROPY_HW_ROMFS_PART2_START, MICROPY_HW_ROMFS_PART2_SIZE),
61-
#endif
6262
};
6363

6464
mp_obj_t mp_vfs_rom_ioctl(size_t n_args, const mp_obj_t *args) {

0 commit comments

Comments
 (0)