@@ -669,10 +669,6 @@ std::vector<du_cell_config> srsran::generate_du_cell_config(const gnb_appconfig&
669669 unsigned cset1_start_crb = 0 ;
670670 if (base_cell.pdcch_cfg .dedicated .coreset1_rb_start .has_value ()) {
671671 cset1_start_crb = base_cell.pdcch_cfg .dedicated .coreset1_rb_start .value ();
672- } else if (not base_cell.pdcch_cfg .dedicated .dci_format_0_1_and_1_1 ) {
673- // [Implementation-defined] Reason for starting from frequency resource 1 (i.e. CRB6) to remove the ambiguity of
674- // UE decoding the DCI in CSS rather than USS when using fallback DCI formats (DCI format 1_0 and 0_0).
675- cset1_start_crb = 6 ;
676672 }
677673 unsigned cset1_l_crb = nof_crbs - cset1_start_crb;
678674 if (base_cell.pdcch_cfg .dedicated .coreset1_l_crb .has_value ()) {
@@ -716,15 +712,15 @@ std::vector<du_cell_config> srsran::generate_du_cell_config(const gnb_appconfig&
716712 ss_cfg.set_non_ss0_monitored_dci_formats (search_space_configuration::ue_specific_dci_format::f0_0_and_f1_0);
717713 }
718714
719- // PDSCH-Config - Update PDSCH time domain resource allocations based on partial slot.
720- if ( band_helper::get_duplex_mode (param. band . value ()) == duplex_mode::TDD) {
721- const auto & tdd_cfg = out_cell.tdd_ul_dl_cfg_common . value ();
722- out_cell. dl_cfg_common . init_dl_bwp . pdsch_common . pdsch_td_alloc_list =
723- config_helpers::make_pdsch_time_domain_resource ( param.search_space0_index ,
724- out_cell.dl_cfg_common .init_dl_bwp .pdcch_common ,
725- out_cell.ue_ded_serv_cell_cfg .init_dl_bwp .pdcch_cfg ,
726- tdd_cfg);
727- }
715+ // PDSCH-Config - Update PDSCH time domain resource allocations based on partial slot and/or dedicated PDCCH
716+ // configuration.
717+ out_cell.dl_cfg_common . init_dl_bwp . pdsch_common . pdsch_td_alloc_list =
718+ config_helpers::make_pdsch_time_domain_resource (
719+ param.search_space0_index ,
720+ out_cell.dl_cfg_common .init_dl_bwp .pdcch_common ,
721+ out_cell.ue_ded_serv_cell_cfg .init_dl_bwp .pdcch_cfg ,
722+ band_helper::get_duplex_mode (param. band . value ()) == duplex_mode::TDD ? out_cell. tdd_ul_dl_cfg_common . value ()
723+ : optional<tdd_ul_dl_config_common>{});
728724
729725 out_cell.ue_ded_serv_cell_cfg .pdsch_serv_cell_cfg ->nof_harq_proc =
730726 (pdsch_serving_cell_config::nof_harq_proc_for_pdsch)config.cells_cfg .front ().cell .pdsch_cfg .nof_harqs ;
@@ -1016,6 +1012,9 @@ srsran::rlc_am_config srsran::generate_rlc_am_config(const rlc_am_appconfig& in_
10161012 }
10171013 out_rlc.rx .t_reassembly = in_cfg.rx .t_reassembly ;
10181014 out_rlc.rx .t_status_prohibit = in_cfg.rx .t_status_prohibit ;
1015+ if (in_cfg.rx .max_sn_per_status != 0 ) {
1016+ out_rlc.rx .max_sn_per_status = in_cfg.rx .max_sn_per_status ;
1017+ }
10191018 return out_rlc;
10201019}
10211020
@@ -1594,8 +1593,9 @@ mac_expert_config srsran::generate_mac_expert_config(const gnb_appconfig& config
15941593 mac_expert_config out_cfg = {};
15951594 const base_cell_appconfig& cell = config.cells_cfg .front ().cell ;
15961595
1597- out_cfg.max_consecutive_dl_kos = cell.pdsch_cfg .max_consecutive_kos ;
1598- out_cfg.max_consecutive_ul_kos = cell.pusch_cfg .max_consecutive_kos ;
1596+ out_cfg.max_consecutive_dl_kos = cell.pdsch_cfg .max_consecutive_kos ;
1597+ out_cfg.max_consecutive_ul_kos = cell.pusch_cfg .max_consecutive_kos ;
1598+ out_cfg.max_consecutive_csi_dtx = cell.pucch_cfg .max_consecutive_kos ;
15991599
16001600 return out_cfg;
16011601}
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