ARM:BIC: update for conversion to C expressions

Author: sipma

chb/arm/opcodes/ARMBitwiseBitClear.py

@@ -49,6 +49,19 @@
 
 
 class ARMBitwiseBitClearXData(ARMOpcodeXData):
+    """Data format:
+    - variables:
+    0: vrd
+
+    - expressions:
+    0: xrn
+    1: xrm
+    2: result
+    3: rresult (result rewritten)
+
+    - c expressions:
+    0: cresult
+    """
 
     def __init__(self, xdata: InstrXData) -> None:
         ARMOpcodeXData.__init__(self, xdata)
@@ -57,26 +70,55 @@ def __init__(self, xdata: InstrXData) -> None:
     def vrd(self) -> "XVariable":
         return self.var(0, "vrd")
 
+    @property
+    def xrn(self) -> "XXpr":
+        return self.xpr(0, "xrn")
+
     @property
     def xrm(self) -> "XXpr":
-        return self.xpr(0, "xrm")
+        return self.xpr(1, "xrm")
 
     @property
     def result(self) -> "XXpr":
-        return self.xpr(1, "result")
+        return self.xpr(2, "result")
+
+    @property
+    def is_result_ok(self) -> bool:
+        return self.is_xpr_ok(2)
 
     @property
     def rresult(self) -> "XXpr":
-        return self.xpr(2, "rresult")
+        return self.xpr(3, "rresult")
+
+    @property
+    def is_rresult_ok(self) -> bool:
+        return self.is_xpr_ok(3)
+
+    @property
+    def cresult(self) -> "XXpr":
+        return self.cxpr(0, "cresult")
+
+    @property
+    def is_cresult_ok(self) -> bool:
+        return self.is_cxpr_ok(0)
 
     @property
     def result_simplified(self) -> str:
-        return simplify_result(
-            self.xdata.args[3], self.xdata.args[4], self.result, self.rresult)
+        if self.is_result_ok and self.is_rresult_ok:
+            return simplify_result(
+                self.xdata.args[3], self.xdata.args[4], self.result, self.rresult)
+        elif self.is_result_ok:
+            return str(self.result)
+        else:
+            return str(self.xrn) + " & ~" + str(self.xrm)
 
     @property
     def annotation(self) -> str:
-        assignment = str(self.vrd) + " := " + self.result_simplified
+        cresult = (
+            " (C: "
+            + (str(self.cresult) if self.is_cresult_ok else "None")
+            + ")")
+        assignment = str(self.vrd) + " := " + self.result_simplified + cresult
         return self.add_instruction_condition(assignment)
 
 
@@ -93,13 +135,8 @@ class ARMBitwiseBitClear(ARMOpcode):
     args[3]: index of op3 in armdictionary
     args[4]: is-wide (thumb)
 
-    xdata format: a:vxxxxrr..dh
-    ---------------------------
-    vars[0]: lhs
-    xprs[0]: rhs1
-    xprs[1]: rhs2
-    xprs[2]: rhs1 & (not (rhs2))
-    xprs[3]: rhs1 & (not (rhs2)) simplified
+    xdata format
+    ------------
     rdefs[0]: rhs1
     rdefs[1]: rhs2
     rdefs[2:.]: result
@@ -121,10 +158,7 @@ def opargs(self) -> List[ARMOperand]:
 
     def annotation(self, xdata: InstrXData) -> str:
         xd = ARMBitwiseBitClearXData(xdata)
-        if xd.is_ok:
-            return xd.annotation
-        else:
-            return "Error value"
+        return xd.annotation
 
     def ast_prov(
             self,
@@ -159,13 +193,22 @@ def ast_prov(
         # high-level assignment
 
         xd = ARMBitwiseBitClearXData(xdata)
-        if not xd.is_ok:
+
+        if xd.is_cresult_ok:
+            rhs = xd.cresult
+
+        elif xd.is_rresult_ok:
+            rhs = xd.rresult
+
+        elif xd.is_result_ok:
+            rhs = xd.result
+
+        else:
             chklogger.logger.error(
-                "Encountered error value at address %s", iaddr)
-            return ([], [])
+                "BIC: Encountered error value for rhs at address %s", iaddr)
+            return ([], [ll_assign])
 
         lhs = xd.vrd
-        rhs = xd.rresult
         defuses = xdata.defuses
         defuseshigh = xdata.defuseshigh