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ARM:EOR: update for conversion to C expressions
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-19
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+43
-19
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chb/arm/opcodes/ARMBitwiseExclusiveOr.py

Lines changed: 43 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -49,6 +49,19 @@
4949

5050

5151
class ARMBitwiseExclusiveOrXData(ARMOpcodeXData):
52+
"""Data format:
53+
- variables:
54+
0: vrd
55+
56+
- expressions:
57+
0: xrn
58+
1: xrm
59+
2: result
60+
3: rresult (result, simplified)
61+
62+
- c expressions:
63+
0: cresult
64+
"""
5265

5366
def __init__(self, xdata: InstrXData) -> None:
5467
ARMOpcodeXData.__init__(self, xdata)
@@ -73,14 +86,31 @@ def result(self) -> "XXpr":
7386
def rresult(self) -> "XXpr":
7487
return self.xpr(3, "rresult")
7588

89+
@property
90+
def is_rresult_ok(self) -> bool:
91+
return self.is_xpr_ok(3)
92+
93+
@property
94+
def cresult(self) -> "XXpr":
95+
return self.cxpr(0, "cresult")
96+
97+
@property
98+
def is_cresult_ok(self) -> bool:
99+
return self.is_cxpr_ok(0)
100+
76101
@property
77102
def result_simplified(self) -> str:
78-
return simplify_result(
79-
self.xdata.args[3], self.xdata.args[4], self.result, self.rresult)
103+
if self.is_rresult_ok:
104+
return simplify_result(
105+
self.xdata.args[3], self.xdata.args[4], self.result, self.rresult)
106+
else:
107+
return str(self.result)
80108

81109
@property
82110
def annotation(self) -> str:
83-
assignment = str(self.vrd) + " := " + self.result_simplified
111+
cr = str(self.cresult) if self.is_cresult_ok else ""
112+
cr = " (C: " + cr + ")"
113+
assignment = str(self.vrd) + " := " + self.result_simplified + cr
84114
return self.add_instruction_condition(assignment)
85115

86116

@@ -98,13 +128,8 @@ class ARMBitwiseExclusiveOr(ARMOpcode):
98128
args[3]: index of op3 in armdictionary
99129
args[4]: is-wide (thumb)
100130
101-
xdata format: a:vxxxxrr..dh
102-
---------------------------
103-
vars[0]: lhs
104-
xprs[0]: rhs1
105-
xprs[1]: rhs2
106-
xprs[2]: (rhs1 xor rhs2)
107-
xprs[3]: (rhs1 xor rhs2)
131+
xdata format:
132+
-------------
108133
rdefs[0]: rhs1
109134
rdefs[1]: rhs2
110135
rdefs[2:.]: result
@@ -131,10 +156,7 @@ def opargs(self) -> List[ARMOperand]:
131156

132157
def annotation(self, xdata: InstrXData) -> str:
133158
xd = ARMBitwiseExclusiveOrXData(xdata)
134-
if xd.is_ok:
135-
return xd.annotation
136-
else:
137-
return "Error value"
159+
return xd.annotation
138160

139161
def ast_prov(
140162
self,
@@ -166,13 +188,15 @@ def ast_prov(
166188
# high-level assignment
167189

168190
xd = ARMBitwiseExclusiveOrXData(xdata)
169-
if not xd.is_ok:
170-
chklogger.logger.error(
171-
"Encountered error value at address %s", iaddr)
172-
return ([], [])
191+
192+
if xd.is_cresult_ok:
193+
rhs = xd.cresult
194+
elif xd.is_rresult_ok:
195+
rhs = xd.rresult
196+
else:
197+
rhs = xd.result
173198

174199
lhs = xd.vrd
175-
rhs = xd.rresult
176200
defuses = xdata.defuses
177201
defuseshigh = xdata.defuseshigh
178202

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