ARM: add rhs to lhs ast-prov conversion

Author: sipma

chb/app/CHVersion.py

@@ -1 +1 @@
-chbversion: str = "0.3.0-20251012"
+chbversion: str = "0.3.0-20251021"

chb/arm/opcodes/ARMAdd.py

@@ -319,7 +319,7 @@ def has_cast() -> bool:
         defuses = xdata.defuses
         defuseshigh = xdata.defuseshigh
 
-        hl_lhs = XU.xvariable_to_ast_lval(lhs, xdata, iaddr, astree)
+        hl_lhs = XU.xvariable_to_ast_lval(lhs, xdata, iaddr, astree, rhs=rhs)
 
         if str(lhs) == "PC":
             chklogger.logger.info(

chb/arm/opcodes/ARMArithmeticShiftRight.py

@@ -220,7 +220,7 @@ def ast_prov(
         defuses = xdata.defuses
         defuseshigh = xdata.defuseshigh
 
-        hl_lhs = XU.xvariable_to_ast_lval(lhs, xdata, iaddr, astree)
+        hl_lhs = XU.xvariable_to_ast_lval(lhs, xdata, iaddr, astree, rhs=rhs)
         hl_rhs = XU.xxpr_to_ast_def_expr(rhs, xdata, iaddr, astree)
 
         hl_assign = astree.mk_assign(

chb/arm/opcodes/ARMLogicalShiftLeft.py

@@ -245,7 +245,7 @@ def ast_prov(
         defuses = xdata.defuses
         defuseshigh = xdata.defuseshigh
 
-        hl_lhs = XU.xvariable_to_ast_lval(lhs, xdata, iaddr, astree)
+        hl_lhs = XU.xvariable_to_ast_lval(lhs, xdata, iaddr, astree, rhs=rhs)
         hl_rhs = XU.xxpr_to_ast_def_expr(rhs, xdata, iaddr, astree)
 
         hl_assign = astree.mk_assign(

chb/arm/opcodes/ARMLogicalShiftRight.py

@@ -234,7 +234,7 @@ def ast_prov(
         defuses = xdata.defuses
         defuseshigh = xdata.defuseshigh
 
-        hl_lhs = XU.xvariable_to_ast_lval(lhs, xdata, iaddr, astree)
+        hl_lhs = XU.xvariable_to_ast_lval(lhs, xdata, iaddr, astree, rhs=rhs)
         hl_rhs = XU.xxpr_to_ast_def_expr(rhs, xdata, iaddr, astree)
 
         hl_assign = astree.mk_assign(

chb/arm/opcodes/ARMReverseSubtract.py

@@ -246,7 +246,7 @@ def ast_prov(
         defuses = xdata.defuses
         defuseshigh = xdata.defuseshigh
 
-        hl_lhs = XU.xvariable_to_ast_lval(lhs, xdata, iaddr, astree)
+        hl_lhs = XU.xvariable_to_ast_lval(lhs, xdata, iaddr, astree, rhs=rhs)
         hl_rhs = XU.xxpr_to_ast_def_expr(rhs, xdata, iaddr, astree)
 
         hl_assign = astree.mk_assign(

chb/arm/opcodes/ARMStoreRegisterHalfword.py

@@ -145,7 +145,19 @@ def is_cxaddr_ok(self) -> bool:
     @property
     def annotation(self) -> str:
         wbu = self.writeback_update()
-        clhs = str(self.cvmem) if self.is_cvmem_ok else "None"
+        if self.is_cvmem_ok:
+            clhs = str(self.cvmem)
+        elif self.is_cxaddr_ok:
+            if self.cxaddr.is_addressof_var:
+                lhsvar = self.cxaddr.get_addressof_var
+                if lhsvar is not None:
+                    clhs = str(lhsvar)
+                else:
+                    clhs = "*(" + str(self.cxaddr) + ")"
+            else:
+                clhs = "*(" + str(self.cxaddr) + ")"
+        else:
+            clhs = "None"
         crhs = str(self.cxrt) if self.is_cxrt_ok else "None"
         assignc = "(C: " + clhs + " := " + crhs + ")"
         if self.is_vmem_ok:
@@ -165,7 +177,6 @@ def annotation(self) -> str:
         return self.add_instruction_condition(assignment + wbu)
 
 
-
 @armregistry.register_tag("STRH", ARMOpcode)
 class ARMStoreRegisterHalfword(ARMOpcode):
     """Stores the least significant halfword from a register into memory.

chb/arm/opcodes/ARMSubtract.py

@@ -236,7 +236,7 @@ def ast_prov(
         defuses = xdata.defuses
         defuseshigh = xdata.defuseshigh
 
-        hl_lhs = XU.xvariable_to_ast_lval(lhs, xdata, iaddr, astree)
+        hl_lhs = XU.xvariable_to_ast_lval(lhs, xdata, iaddr, astree, rhs=rhs)
 
         # resulting expression is a stack address
         if str(rhs1) == "SP" and xrhs.is_stack_address:

chb/arm/opcodes/ARMTestEquivalence.py

@@ -90,6 +90,10 @@ def __init__(self, d: "ARMDictionary", ixval: IndexedTableValue) -> None:
     def operands(self) -> List[ARMOperand]:
         return [self.armd.arm_operand(i) for i in self.args]
 
+    @property
+    def opargs(self) -> List[ARMOperand]:
+        return [self.armd.arm_operand(i) for i in self.args]
+
     def annotation(self, xdata: InstrXData) -> str:
         xd = ARMTestEquivalenceXData(xdata)
         if xd.is_ok: