CHB:MIPS: fix warnings and reformat

Author: sipma

CodeHawk/CHB/bchlibmips32/bCHAssembleMIPSInstruction.ml

@@ -1,21 +1,21 @@
 (* =============================================================================
-   CodeHawk Binary Analyzer 
+   CodeHawk Binary Analyzer
    Author: Henny Sipma
    ------------------------------------------------------------------------------
    The MIT License (MIT)
- 
-   Copyright (c) 2022 Aarno Labs LLC
+
+   Copyright (c) 2022-2024  Aarno Labs LLC
 
    Permission is hereby granted, free of charge, to any person obtaining a copy
    of this software and associated documentation files (the "Software"), to deal
    in the Software without restriction, including without limitation the rights
    to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
    copies of the Software, and to permit persons to whom the Software is
    furnished to do so, subject to the following conditions:
- 
+
    The above copyright notice and this permission notice shall be included in all
    copies or substantial portions of the Software.
-  
+
    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
@@ -28,11 +28,15 @@
 (* chlib *)
 open CHNumerical
 
+(* chutil *)
+open CHLogger
+
 (* bchlib *)
 open BCHDoubleword
 open BCHLibTypes
 
 (* bchlibmips32 *)
+open BCHMIPSOpcodeRecords
 open BCHMIPSOperand
 open BCHMIPSTypes
 
@@ -49,6 +53,7 @@ let int2dw (i: int) = TR.tget_ok (int_to_doubleword i)
 let ri (op: mips_operand_int): int = op#get_register_index
 let rii (op: mips_operand_int): int = op#get_indirect_register_index
 
+
 let assemble_mips_instruction
       ?(iaddr=wordzero) (opc: mips_opcode_t): doubleword_int =
   match opc with
@@ -62,7 +67,18 @@ let assemble_mips_instruction
        + ((ri rs) lsl 16)
        + mem#get_indirect_offset#toInt in
      int2dw v
-  | _ -> wordzero
+  | _ ->
+     begin
+       chlog#add
+         "assemble mips instruction"
+         (LBLOCK [
+              STR "Opcode ";
+              STR (mips_opcode_to_string opc);
+              STR " at address ";
+              iaddr#toPretty;
+              STR " not yet supported"]);
+       wordzero
+     end
 
 
 let assemble_mips_move_instruction
@@ -90,4 +106,3 @@ let assemble_mips_sw_stack_instruction
     dw#to_fixed_length_hex_string
   else
     dw#to_fixed_length_hex_string_le
-

CodeHawk/CHB/bchlibmips32/bCHAssembleMIPSInstruction.mli

@@ -4,7 +4,7 @@
    ------------------------------------------------------------------------------
    The MIT License (MIT)
  
-   Copyright (c) 2022 Aarno Labs LLC
+   Copyright (c) 2022-2024  Aarno Labs LLC
 
    Permission is hereby granted, free of charge, to any person obtaining a copy
    of this software and associated documentation files (the "Software"), to deal

CodeHawk/CHB/bchlibmips32/bCHDisassembleMIPS.ml

@@ -28,40 +28,33 @@
    ============================================================================= *)
 
 (* chlib *)
-open CHNumerical
 open CHPretty
 
 (* chutil *)
 open CHLogger
 
 (* xprlib *)
-open Xprt
 open XprToPretty
 open XprTypes
-open Xsimplify
 
 (* bchlib *)
 open BCHBasicTypes
 open BCHByteUtilities
 open BCHDataBlock
 open BCHDoubleword
 open BCHFloc
-open BCHFunctionInterface
 open BCHFunctionData
 open BCHFunctionInfo
 open BCHFunctionSummaryLibrary
-open BCHJumpTable
 open BCHLibTypes
 open BCHLocation
 open BCHMakeCallTargetInfo
 open BCHStreamWrapper
 open BCHSystemInfo
 open BCHSystemSettings
-open BCHUtilities
 
 (* bchlibelf *)
 open BCHELFHeader
-open BCHELFTypes
 
 (* bchlibmips32 *)
 open BCHMIPSAssemblyBlock
@@ -427,10 +420,11 @@ let set_library_stub_name faddr =
     chlog#add "faddr is not a program address" faddr#toPretty
 
 
-let extract_so_symbol (opcodes:mips_opcode_t list) = None    (* TBD *)
+let extract_so_symbol (_opcodes:mips_opcode_t list) = None    (* TBD *)
 
 
-let get_so_target (tgtaddr:doubleword_int) (instr:mips_assembly_instruction_int) =
+let get_so_target
+      (tgtaddr:doubleword_int) (_instr:mips_assembly_instruction_int) =
   if functions_data#has_function_name tgtaddr then
     let fndata = functions_data#get_function tgtaddr in
     if fndata#is_library_stub then
@@ -459,7 +453,7 @@ let collect_function_entry_points () =
   begin
     addresses#addList functions_data#get_function_entry_points;
     !mips_assembly_instructions#itera
-     (fun va instr ->
+     (fun _va instr ->
        match instr#get_opcode with
        | BranchLTZeroLink (_,tgt)
          | BranchGEZeroLink (_,tgt)
@@ -554,10 +548,12 @@ let set_block_boundaries () =
   end
 
 
+(*
 let is_so_jump_target (target_address:doubleword_int) =
   match elf_header#get_relocation target_address with
   | Some _ -> true
   | _ -> false
+ *)
 
 
 let get_successors (faddr:doubleword_int) (iaddr:doubleword_int)  =
@@ -749,7 +745,7 @@ let trace_function (faddr:doubleword_int) =
   make_mips_assembly_function faddr blocklist successors
 
 
-let construct_mips_assembly_function (count:int) (faddr:doubleword_int) =
+let construct_mips_assembly_function (_count: int) (faddr: doubleword_int) =
   try
     let _ = pverbose [STR "  trace function "; faddr#toPretty; NL] in
     let fn = trace_function faddr in
@@ -842,7 +838,7 @@ let record_call_targets () =
                           finfo#set_call_target
                             ctxtiaddr (mk_app_target op#get_absolute_address)
                    end
-              | JumpLinkRegister (ra, op) ->
+              | JumpLinkRegister (_ra, _op) ->
                  let iaddr = (ctxt_string_to_location faddr ctxtiaddr)#i in
                  if finfo#has_call_target ctxtiaddr then
                    let loc = ctxt_string_to_location faddr ctxtiaddr in
@@ -1037,7 +1033,7 @@ let resolve_indirect_mips_calls (f:mips_assembly_function_int) =
       (fun faddr ctxtiaddr instr ->
         let loc = ctxt_string_to_location faddr ctxtiaddr in
         match instr#get_opcode with
-        | JumpLinkRegister (ra, tgt) ->
+        | JumpLinkRegister (_ra, tgt) ->
            let floc = get_floc loc in
            if (floc#has_call_target && floc#get_call_target#is_unknown)
               || not floc#has_call_target then

CodeHawk/CHB/bchlibmips32/bCHDisassembleMIPS.mli

@@ -6,7 +6,7 @@
 
    Copyright (c) 2005-2019 Kestrel Technology LLC
    Copyright (c) 2020      Henny Sipma
-   Copyright (c) 2021-2023 Aarno Labs LLC
+   Copyright (c) 2021-2024 Aarno Labs LLC
 
    Permission is hereby granted, free of charge, to any person obtaining a copy
    of this software and associated documentation files (the "Software"), to deal
@@ -27,9 +27,6 @@
    SOFTWARE.
    ============================================================================= *)
 
-(* chlib *)
-open CHPretty
-
 (* bchlib *)
 open BCHLibTypes
 

CodeHawk/CHB/bchlibmips32/bCHDisassembleMIPSInstruction.ml

@@ -6,7 +6,7 @@
  
    Copyright (c) 2005-2020 Kestrel Technology LLC
    Copyright (c) 2020      Henny Sipma
-   Copyright (c) 2021-2022 Aarno Labs LLC
+   Copyright (c) 2021-2024 Aarno Labs LLC
 
    Permission is hereby granted, free of charge, to any person obtaining a copy
    of this software and associated documentation files (the "Software"), to deal
@@ -33,21 +33,12 @@ open CHNumerical
 
 (* chutil *)
 open CHLogger
-open CHPrettyUtil
 
 (* bchlib *)
-open BCHBasicTypes
-open BCHCPURegisters
-open BCHDoubleword
-open BCHImmediate
 open BCHLibTypes
-open BCHStreamWrapper
-open BCHSystemInfo
-open BCHSystemSettings
 
 (* bchlibmips32 *)
 open BCHMIPSDisassemblyUtils
-open BCHMIPSOpcodeRecords
 open BCHMIPSOperand
 open BCHMIPSTypes
 
@@ -173,7 +164,7 @@ let parse_J_opcode
 
 let parse_R_opcode
       (instr: doubleword_int)
-      (opc: int)
+      (_opc: int)
       (rrs: int)
       (rrt: int)
       (rrd: int)
@@ -228,11 +219,11 @@ let parse_R_opcode
 
 let parse_R2_opcode
       (instr: doubleword_int)
-      (opc: int)
+      (_opc: int)
       (rrs: int)
       (rrt: int)
       (rrd: int)
-      (samt: int)
+      (_samt: int)
       (fnct: int) =
   let rs = select_mips_reg rrs in
   let rt = select_mips_reg rrt in
@@ -252,7 +243,7 @@ let parse_R2_opcode
 
 let parse_R3_opcode
       (instr: doubleword_int)
-      (opc: int)
+      (_opc: int)
       (rrs: int)
       (rrt: int)
       (rrd: int)
@@ -277,12 +268,12 @@ let parse_R3_opcode
 
 let parse_FPMC_opcode
       (instr: doubleword_int)
-      (opc: int)
+      (_opc: int)
       (rrs: int)
       (cc: int)
       (tf: int)
       (rrd: int)
-      (ffd: int)
+      (_ffd: int)
       (funct: int) =
   let rs = select_mips_reg rrs in
   let rd = select_mips_reg rrd in
@@ -298,7 +289,7 @@ let parse_FPMC_opcode
 
 let parse_FPRI_opcode
       (instr: doubleword_int)
-      (opc: int)
+      (_opc: int)
       (sub: int)
       (rrt: int)
       (fs: int)
@@ -351,7 +342,7 @@ let parse_FPRI_opcode
 
 let parse_FPR_opcode
       (instr: doubleword_int)
-      (opc: int)
+      (_opc: int)
       (fmt: int)
       (ft: int)
       (fs: int)
@@ -388,8 +379,8 @@ let parse_FPR_opcode
 let parse_FPICC_opcode
       (instr: doubleword_int)
       (iaddr: doubleword_int)
-      (opc: int)
-      (sub: int)
+      (_opc: int)
+      (_sub: int)
       (cc: int)
       (nd: int)
       (tf: int)
@@ -439,17 +430,17 @@ let parse_opcode
        parse_R2_opcode instrbytes opc rs rt rd sa fn
     | R3Type (opc, rs, rt, rd, sa, fn) ->
        parse_R3_opcode instrbytes opc rs rt rd sa fn
-    | FPMCType (opc, rs, cc, nd, tf, rd, fd, funct) ->
+    | FPMCType (opc, rs, cc, _nd, tf, rd, fd, funct) ->
        parse_FPMC_opcode instrbytes opc rs cc tf rd fd funct
     | FPRIType (opc, sub, rt, fs, imm) ->
        parse_FPRI_opcode instrbytes opc sub rt fs imm
     | FPRType (opc, fmt, ft, fs, fd, funct) ->
        parse_FPR_opcode instrbytes opc fmt ft fs fd funct
     | FPICCType (opc, sub, cc, nd, tf, offset) ->
        parse_FPICC_opcode instrbytes iaddr opc sub cc nd tf offset
-    | FPCompareType (opc, fmt, ft, fs, cc, cond) ->
+    | FPCompareType (_opc, fmt, ft, fs, cc, cond) ->
        parse_FPCompare_opcode fmt ft fs cc cond
-    | FormatUnknown(opc, otherbits) ->
+    | FormatUnknown(_opc, _otherbits) ->
        NotRecognized ("parse_opcode:format_unknown", instrbytes) in
   opcode
 

CodeHawk/CHB/bchlibmips32/bCHDisassembleMIPSInstruction.mli

@@ -6,7 +6,7 @@
  
    Copyright (c) 2005-2019 Kestrel Technology LLC
    Copyright (c) 2020      Henny Sipma
-   Copyright (c) 2021-2022 Aarno Labs LLC
+   Copyright (c) 2021-2024 Aarno Labs LLC
 
    Permission is hereby granted, free of charge, to any person obtaining a copy
    of this software and associated documentation files (the "Software"), to deal

CodeHawk/CHB/bchlibmips32/bCHFnMIPSDictionary.ml

@@ -6,7 +6,7 @@
 
    Copyright (c) 2005-2020 Kestrel Technology LLC
    Copyright (c) 2020-2021 Henny Sipma
-   Copyright (c) 2021-2023 Aarno Labs LLC
+   Copyright (c) 2021-2024 Aarno Labs LLC
 
    Permission is hereby granted, free of charge, to any person obtaining a copy
    of this software and associated documentation files (the "Software"), to deal
@@ -132,7 +132,8 @@ object (self)
                          (TR.tget_ok (floc#env#get_global_variable_address v)) ->
              num_constant_expr
                (elf_header#get_program_value
-                  (TR.tget_ok (floc#env#get_global_variable_address v)))#to_numerical
+                  (TR.tget_ok
+                     (floc#env#get_global_variable_address v)))#to_numerical
           | XVar v when floc#env#is_symbolic_value v ->
              expand (TR.tget_ok (floc#env#get_symbolic_value_expr v))
           | XOp (op,l) -> XOp (op, List.map expand l)

CodeHawk/CHB/bchlibmips32/bCHFnMIPSDictionary.mli

@@ -6,7 +6,7 @@
  
    Copyright (c) 2005-2019 Kestrel Technology LLC
    Copyright (c) 2020      Henny Sipma
-   Copyright (c) 2021-2023 Aarno Labs LLC
+   Copyright (c) 2021-2024 Aarno Labs LLC
 
    Permission is hereby granted, free of charge, to any person obtaining a copy
    of this software and associated documentation files (the "Software"), to deal