Change to Data Memory Barrier from Data Synchronization Barrier in phy driver

Additonal minor cleanup

Author: dtjones190

README.md

@@ -25,7 +25,7 @@ stm32-eth = { version = "0.2.0", features = ["stm32f429"] }
 or
 ```rust
 stm32f7xx-hal = { version = "0.2.0", features = ["stm32f767"] }
-stm32-eth = { version = "0.1.1", features = ["stm32f767"]}
+stm32-eth = { version = "0.2.0", features = ["stm32f767"]}
 ```
 
 In `src/main.rs` add:

src/lib.rs

@@ -312,8 +312,8 @@ impl<'rx, 'tx> Eth<'rx, 'tx> {
         f: F,
     ) -> Result<R, TxError> {
         let result = self.tx_ring.send(length, f);
-        //Wait for the memory to sync with the cache
-        asm::dsb();
+        //Make sure the memory write occurs before triggering DMA
+        asm::dmb();
         self.tx_ring.demand_poll(&self.eth_dma);
         result
     }

src/smoltcp_phy.rs

@@ -11,7 +11,7 @@ impl<'a, 'rx, 'tx, 'b> Device<'a> for &'b mut Eth<'rx, 'tx> {
 
     fn capabilities(&self) -> DeviceCapabilities {
         let mut caps = DeviceCapabilities::default();
-        caps.max_transmission_unit = 1522;
+        caps.max_transmission_unit = super::MTU;
         caps.max_burst_size = Some(1);
         caps
     }