Merge pull request #6 from starboundstitch/starboundstitch/stm32c071-init

Add support for stm32c071

Author: nisembedded

Cargo.toml

@@ -48,6 +48,7 @@ device-selected = []
 rt = ["stm32c0/rt"]
 stm32c011 = ["stm32c0/stm32c011", "device-selected"]
 stm32c031 = ["stm32c0/stm32c031", "device-selected"]
+stm32c071 = ["stm32c0/stm32c071", "device-selected"]
 
 i2c-blocking = []
 i2c-nonblocking = []

src/exti.rs

@@ -23,6 +23,8 @@ pub enum Event {
     GPIO15 = 15,
     RTC = 19,
     I2C1 = 23,
+    #[cfg(feature = "stm32c071")]
+    I2C2 = 24,
     USART1 = 25,
     LSE_CSS = 31,
 }

src/i2c/blocking.rs

@@ -6,6 +6,9 @@ use crate::rcc::*;
 use crate::stm32::I2C1;
 use hal::blocking::i2c::{Read, Write, WriteRead};
 
+#[cfg(feature = "stm32c071")]
+use crate::stm32::I2C2;
+
 pub trait I2cSlave {
     /// Enable/Disable Slave Byte Control. Default SBC is switched on.
     /// For master write/read the transaction should start with sbc disabled.
@@ -521,3 +524,25 @@ i2c!(
         (PB7<Output<OpenDrain>>, AltFunction::AF14),
     ],
 );
+
+#[cfg(feature = "stm32c071")]
+i2c!(
+    I2C2,
+    i2c2,
+    sda: [
+        (PA6<Output<OpenDrain>>, AltFunction::AF6),
+        (PA12<Output<OpenDrain>>, AltFunction::AF6),
+        (PA10<Output<OpenDrain>>, AltFunction::AF8),
+        (PB4<Output<OpenDrain>>, AltFunction::AF6),
+        (PB11<Output<OpenDrain>>, AltFunction::AF6),
+        (PB14<Output<OpenDrain>>, AltFunction::AF6),
+    ],
+    scl: [
+        (PA7<Output<OpenDrain>>, AltFunction::AF6),
+        (PA11<Output<OpenDrain>>, AltFunction::AF6),
+        (PA9<Output<OpenDrain>>, AltFunction::AF8),
+        (PB3<Output<OpenDrain>>, AltFunction::AF5),
+        (PB10<Output<OpenDrain>>, AltFunction::AF6),
+        (PB13<Output<OpenDrain>>, AltFunction::AF6),
+    ],
+);

src/i2c/nonblocking.rs

@@ -7,6 +7,9 @@ use crate::rcc::*;
 use crate::stm32::I2C;
 use nb::Error::{Other, WouldBlock};
 
+#[cfg(feature = "stm32c071")]
+use crate::stm32::I2C2;
+
 pub trait I2cControl {
     /// Start listening for an interrupt event, will also enable non_blocking mode
     fn listen(&mut self);
@@ -604,3 +607,25 @@ i2c!(
         (PB7<Output<OpenDrain>>, AltFunction::AF14),
     ],
 );
+
+#[cfg(feature = "stm32c071")]
+i2c!(
+    I2C2,
+    i2c2,
+    sda: [
+        (PA6<Output<OpenDrain>>, AltFunction::AF6),
+        (PA12<Output<OpenDrain>>, AltFunction::AF6),
+        (PA10<Output<OpenDrain>>, AltFunction::AF8),
+        (PB4<Output<OpenDrain>>, AltFunction::AF6),
+        (PB11<Output<OpenDrain>>, AltFunction::AF6),
+        (PB14<Output<OpenDrain>>, AltFunction::AF6),
+    ],
+    scl: [
+        (PA7<Output<OpenDrain>>, AltFunction::AF6),
+        (PA11<Output<OpenDrain>>, AltFunction::AF6),
+        (PA9<Output<OpenDrain>>, AltFunction::AF8),
+        (PB3<Output<OpenDrain>>, AltFunction::AF5),
+        (PB10<Output<OpenDrain>>, AltFunction::AF6),
+        (PB13<Output<OpenDrain>>, AltFunction::AF6),
+    ],
+);

src/lib.rs

@@ -23,6 +23,9 @@ pub use stm32c0::stm32c011 as stm32;
 #[cfg(feature = "stm32c031")]
 pub use stm32c0::stm32c031 as stm32;
 
+#[cfg(feature = "stm32c071")]
+pub use stm32c0::stm32c071 as stm32;
+
 #[cfg(feature = "rt")]
 pub use crate::stm32::interrupt;
 

src/rcc/enable.rs

@@ -137,3 +137,8 @@ bus! {
     GPIOD => (IOP, gpioden, gpiodsmen, gpiodrst), // 3
     GPIOF => (IOP, gpiofen, gpiofsmen, gpiofrst), // 5
 }
+
+#[cfg(feature = "stm32c071")]
+bus! {
+    I2C2 => (APB1, i2c2en, i2c2smen, i2c2rst), // 21
+}

src/timer/opm.rs

@@ -67,7 +67,7 @@ macro_rules! opm {
                     unsafe {
                         let tim = &*$TIMX::ptr();
                         tim.psc().write(|w| w.psc().bits(psc as u16));
-                        tim.arr().write(|w| w.$arr().bits(reload as u16));
+                        tim.arr().write(|w| w.$arr().bits((reload as u16).into()));
                         $(
                             tim.arr.modify(|_, w| w.$arr_h().bits((reload >> 16) as u16));
                         )*

src/timer/pwm.rs

@@ -88,7 +88,7 @@ macro_rules! pwm {
 
                     unsafe {
                         self.tim.psc().write(|w| w.psc().bits(psc as u16));
-                        self.tim.arr().write(|w| w.$arr().bits(arr as u16));
+                        self.tim.arr().write(|w| w.$arr().bits((arr as u16).into()));
                         $(
                             self.tim.arr().modify(|_, w| w.$arr_h().bits((arr >> 16) as u16));
                         )*

src/timer/qei.rs

@@ -83,7 +83,7 @@ macro_rules! qei {
                 type Count = u16;
 
                 fn count(&self) -> u16 {
-                    self.tim.cnt().read().$cnt().bits()
+                    self.tim.cnt().read().$cnt().bits() as u16
                 }
 
                 fn direction(&self) -> Direction {