Merge pull request #9 from jessebraham/stm32f070-support

Add initial STM32F070 support

Author: therealprof

.travis.yml

@@ -4,11 +4,14 @@ rust:
   - nightly
 cache: cargo
 env:
-- MCU=stm32f042
-- MCU=stm32f030
-- MCU=stm32f030x6
-- MCU=stm32f030x8
-- MCU=stm32f030xc
+  - MCU=stm32f042
+  - MCU=stm32f030
+  - MCU=stm32f030x6
+  - MCU=stm32f030x8
+  - MCU=stm32f030xc
+  - MCU=stm32f070
+  - MCU=stm32f070x6
+  - MCU=stm32f070xb
 matrix:
   allow_failures:
     - rust: nightly

Cargo.toml

@@ -53,6 +53,9 @@ stm32f030x4 = ["stm32f030x6"]
 stm32f030x6 = ["stm32f030"]
 stm32f030x8 = ["stm32f030"]
 stm32f030xc = ["stm32f030"]
+stm32f070 = ["stm32f0/stm32f0x0"]
+stm32f070x6 = ["stm32f070"]
+stm32f070xb = ["stm32f070"]
 
 [profile.dev]
 debug = true

README.md

@@ -12,6 +12,9 @@ Currently supported configuration are:
 * stm32f030x6
 * stm32f030x8
 * stm32f030xc
+* stm32f070
+* stm32f070x6
+* stm32f070xb
 
 The idea behind this crate is to gloss over the slight differences in the
 various peripherals available on those MCUs so a HAL can be written for all

src/gpio.rs

@@ -497,7 +497,7 @@ macro_rules! gpio {
     }
 }
 
-#[cfg(any(feature = "stm32f042", feature = "stm32f030",))]
+#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
 gpio!(GPIOA, gpioa, iopaen, PA, [
     PA0: (pa0, 0, Input<Floating>),
     PA1: (pa1, 1, Input<Floating>),
@@ -517,7 +517,7 @@ gpio!(GPIOA, gpioa, iopaen, PA, [
     PA15: (pa15, 15, Input<Floating>),
 ]);
 
-#[cfg(any(feature = "stm32f042", feature = "stm32f030"))]
+#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
 gpio!(GPIOB, gpiob, iopben, PB, [
     PB0: (pb0, 0, Input<Floating>),
     PB1: (pb1, 1, Input<Floating>),
@@ -544,7 +544,7 @@ gpio!(GPIOC, gpioc, iopcen, PC, [
     PC15: (pc15, 15, Input<Floating>),
 ]);
 
-#[cfg(feature = "stm32f030")]
+#[cfg(any(feature = "stm32f030", feature = "stm32f070"))]
 gpio!(GPIOC, gpioc, iopcen, PC, [
     PC0: (pb0, 0, Input<Floating>),
     PC1: (pb1, 1, Input<Floating>),
@@ -564,7 +564,7 @@ gpio!(GPIOC, gpioc, iopcen, PC, [
     PC15: (pb15, 15, Input<Floating>),
 ]);
 
-#[cfg(feature = "stm32f030")]
+#[cfg(any(feature = "stm32f030", feature = "stm32f070"))]
 gpio!(GPIOD, gpiod, iopden, PD, [
     PD2: (pd2, 2, Input<Floating>),
 ]);
@@ -585,3 +585,9 @@ gpio!(GPIOF, gpiof, iopfen, PF, [
     PF6: (pf6, 5, Input<Floating>),
     PF7: (pf7, 5, Input<Floating>),
 ]);
+
+#[cfg(feature = "stm32f070")]
+gpio!(GPIOF, gpiof, iopfen, PF, [
+    PF0: (pf0, 0, Input<Floating>),
+    PF1: (pf1, 1, Input<Floating>),
+]);

src/lib.rs

@@ -6,7 +6,7 @@ pub use stm32f0;
 #[cfg(feature = "stm32f042")]
 pub use stm32f0::stm32f0x2 as stm32;
 
-#[cfg(feature = "stm32f030")]
+#[cfg(any(feature = "stm32f030", feature = "stm32f070"))]
 pub use stm32f0::stm32f0x0 as stm32;
 
 pub mod delay;

src/rcc.rs

@@ -1,8 +1,8 @@
 use core::cmp;
 
-use cast::u32;
-#[cfg(any(feature = "stm32f042", feature = "stm32f030"))]
+#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
 use crate::stm32::{FLASH, RCC};
+use cast::u32;
 
 use crate::time::Hertz;
 
@@ -12,7 +12,7 @@ pub trait RccExt {
     fn constrain(self) -> Rcc;
 }
 
-#[cfg(any(feature = "stm32f042", feature = "stm32f030"))]
+#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
 impl RccExt for RCC {
     fn constrain(self) -> Rcc {
         Rcc {
@@ -38,7 +38,7 @@ pub struct CFGR {
     sysclk: Option<u32>,
 }
 
-#[cfg(any(feature = "stm32f042", feature = "stm32f030"))]
+#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
 impl CFGR {
     pub fn hclk<F>(mut self, freq: F) -> Self
     where

src/serial.rs

@@ -31,7 +31,7 @@ use embedded_hal::prelude::*;
 use nb::block;
 use void::Void;
 
-#[cfg(any(feature = "stm32f042", feature = "stm32f030"))]
+#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
 use crate::stm32;
 
 use crate::gpio::*;
@@ -94,18 +94,26 @@ usart_pins! {
         rx => [gpioa::PA3<Alternate<AF1>>, gpioa::PA15<Alternate<AF1>>],
     }
 }
+#[cfg(feature = "stm32f070")]
+usart_pins! {
+    USART1 => {
+        tx => [gpioa::PA9<Alternate<AF1>>, gpiob::PB6<Alternate<AF0>>],
+        rx => [gpioa::PA10<Alternate<AF1>>, gpiob::PB7<Alternate<AF0>>],
+    }
+}
 #[cfg(any(
     feature = "stm32f042",
     feature = "stm32f030x8",
     feature = "stm32f030xc",
+    feature = "stm32f070",
 ))]
 usart_pins! {
     USART2 => {
         tx => [gpioa::PA2<Alternate<AF1>>, gpioa::PA14<Alternate<AF1>>],
         rx => [gpioa::PA3<Alternate<AF1>>, gpioa::PA15<Alternate<AF1>>],
     }
 }
-#[cfg(feature = "stm32f030xc")]
+#[cfg(any(feature = "stm32f030xc", feature = "stm32f070xb"))]
 usart_pins! {
     USART3 => {
         // According to the datasheet PB10 is both tx and rx, but in stm32cubemx it's only tx
@@ -116,6 +124,9 @@ usart_pins! {
         tx => [gpioa::PA0<Alternate<AF4>>, gpioc::PC10<Alternate<AF0>>],
         rx => [gpioa::PA1<Alternate<AF4>>, gpioc::PC11<Alternate<AF0>>],
     }
+}
+#[cfg(feature = "stm32f030xc")]
+usart_pins! {
     USART5 => {
         tx => [gpiob::PB3<Alternate<AF4>>, gpioc::PC12<Alternate<AF2>>],
         rx => [gpiob::PB4<Alternate<AF4>>, gpiod::PD2<Alternate<AF2>>],
@@ -179,22 +190,26 @@ macro_rules! usart {
     }
 }
 
-#[cfg(any(feature = "stm32f042", feature = "stm32f030"))]
+#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
 usart! {
     USART1: (usart1, usart1en, apb2enr),
 }
 #[cfg(any(
     feature = "stm32f042",
     feature = "stm32f030x8",
-    feature = "stm32f030xc"
+    feature = "stm32f030xc",
+    feature = "stm32f070",
 ))]
 usart! {
     USART2: (usart2, usart2en, apb1enr),
 }
-#[cfg(any(feature = "stm32f030xc"))]
+#[cfg(any(feature = "stm32f030xc", feature = "stm32f070xb"))]
 usart! {
     USART3: (usart3, usart3en, apb1enr),
     USART4: (usart4, usart4en, apb1enr),
+}
+#[cfg(feature = "stm32f030xc")]
+usart! {
     USART5: (usart5, usart5en, apb1enr),
     USART6: (usart6, usart6en, apb2enr),
 }

src/timers.rs

@@ -209,7 +209,7 @@ macro_rules! timers {
     }
 }
 
-#[cfg(any(feature = "stm32f030", feature = "stm32f042",))]
+#[cfg(any(feature = "stm32f030", feature = "stm32f042", feature = "stm32f070"))]
 timers! {
     TIM1: (tim1, tim1en, tim1rst, apb2enr, apb2rstr),
     TIM3: (tim3, tim3en, tim3rst, apb1enr, apb1rstr),
@@ -218,13 +218,17 @@ timers! {
     TIM17: (tim17, tim17en, tim17rst, apb2enr, apb2rstr),
 }
 
-#[cfg(any(feature = "stm32f030x8", feature = "stm32f030xc"))]
+#[cfg(any(
+    feature = "stm32f030x8",
+    feature = "stm32f030xc",
+    feature = "stm32f070xb",
+))]
 timers! {
     TIM6: (tim6, tim6en, tim6rst, apb1enr, apb1rstr),
     TIM15: (tim15, tim15en, tim15rst, apb2enr, apb2rstr),
 }
 
-#[cfg(feature = "stm32f030xc")]
+#[cfg(any(feature = "stm32f030xc", feature = "stm32f070xb"))]
 timers! {
     TIM7: (tim7, tim7en, tim7rst, apb1enr, apb1rstr),
 }