Rework timers so there are no warnings

Author: david-sawatzke

src/timers.rs

@@ -24,10 +24,7 @@
 //! }
 //! ```
 
-#[cfg(feature = "stm32f030")]
-use crate::stm32::{RCC, TIM1, TIM14, TIM15, TIM16, TIM17, TIM3, TIM6, TIM7};
-#[cfg(feature = "stm32f042")]
-use crate::stm32::{RCC, TIM1, TIM14, TIM16, TIM17, TIM2, TIM3};
+use crate::stm32;
 use cortex_m::peripheral::syst::SystClkSource;
 use cortex_m::peripheral::SYST;
 
@@ -111,6 +108,7 @@ impl Periodic for Timer<SYST> {}
 macro_rules! timers {
     ($($TIM:ident: ($tim:ident, $timXen:ident, $timXrst:ident, $apbenr:ident, $apbrstr:ident),)+) => {
         $(
+            use crate::stm32::$TIM;
             impl Timer<$TIM> {
                 // XXX(why not name this `new`?) bummer: constructors need to have different names
                 // even if the `$TIM` are non overlapping (compare to the `free` function below
@@ -121,7 +119,7 @@ macro_rules! timers {
                     T: Into<Hertz>,
                 {
                     // NOTE(unsafe) This executes only during initialisation
-                    let rcc = unsafe { &(*RCC::ptr()) };
+                    let rcc = unsafe { &(*stm32::RCC::ptr()) };
 
                     // enable and reset peripheral to a clean slate state
                     rcc.$apbenr.modify(|_, w| w.$timXen().set_bit());
@@ -159,8 +157,7 @@ macro_rules! timers {
 
                 /// Releases the TIM peripheral
                 pub fn release(self) -> $TIM {
-                    use crate::stm32::RCC;
-                    let rcc = unsafe { &(*RCC::ptr()) };
+                    let rcc = unsafe { &(*stm32::RCC::ptr()) };
                     // Pause counter
                     self.tim.cr1.modify(|_, w| w.cen().clear_bit());
                     // Disable timer