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Use macros for initalization code
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+56
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src/serial.rs

Lines changed: 56 additions & 62 deletions
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@ use nb::block;
77
use void::Void;
88

99
#[cfg(any(feature = "stm32f042", feature = "stm32f030"))]
10-
use crate::stm32::{usart1, RCC, USART1, USART2};
10+
use crate::stm32;
1111

1212
use crate::gpio::*;
1313
use crate::rcc::Clocks;
@@ -39,41 +39,41 @@ pub enum Error {
3939
pub trait Pins<USART> {}
4040

4141
#[cfg(any(feature = "stm32f030", feature = "stm32f042"))]
42-
impl Pins<USART1> for (gpioa::PA9<Alternate<AF1>>, gpioa::PA10<Alternate<AF1>>) {}
42+
impl Pins<stm32::USART1> for (gpioa::PA9<Alternate<AF1>>, gpioa::PA10<Alternate<AF1>>) {}
4343
#[cfg(any(feature = "stm32f030", feature = "stm32f042"))]
44-
impl Pins<USART1> for (gpiob::PB6<Alternate<AF0>>, gpiob::PB7<Alternate<AF0>>) {}
44+
impl Pins<stm32::USART1> for (gpiob::PB6<Alternate<AF0>>, gpiob::PB7<Alternate<AF0>>) {}
4545
#[cfg(any(feature = "stm32f030", feature = "stm32f042"))]
46-
impl Pins<USART1> for (gpioa::PA9<Alternate<AF1>>, gpiob::PB7<Alternate<AF0>>) {}
46+
impl Pins<stm32::USART1> for (gpioa::PA9<Alternate<AF1>>, gpiob::PB7<Alternate<AF0>>) {}
4747
#[cfg(any(feature = "stm32f030", feature = "stm32f042"))]
48-
impl Pins<USART1> for (gpiob::PB6<Alternate<AF0>>, gpioa::PA10<Alternate<AF1>>) {}
48+
impl Pins<stm32::USART1> for (gpiob::PB6<Alternate<AF0>>, gpioa::PA10<Alternate<AF1>>) {}
4949

5050
#[cfg(feature = "stm32f030x6")]
51-
impl Pins<USART1> for (gpioa::PA2<Alternate<AF1>>, gpioa::PA3<Alternate<AF1>>) {}
51+
impl Pins<stm32::USART1> for (gpioa::PA2<Alternate<AF1>>, gpioa::PA3<Alternate<AF1>>) {}
5252

5353
#[cfg(any(
5454
feature = "stm32f042",
5555
feature = "stm32f030x8",
5656
feature = "stm32f030xc",
5757
))]
58-
impl Pins<USART2> for (gpioa::PA2<Alternate<AF1>>, gpioa::PA3<Alternate<AF1>>) {}
58+
impl Pins<stm32::USART2> for (gpioa::PA2<Alternate<AF1>>, gpioa::PA3<Alternate<AF1>>) {}
5959
#[cfg(any(
6060
feature = "stm32f042",
6161
feature = "stm32f030x8",
6262
feature = "stm32f030xc",
6363
))]
64-
impl Pins<USART2> for (gpioa::PA2<Alternate<AF1>>, gpioa::PA15<Alternate<AF1>>) {}
64+
impl Pins<stm32::USART2> for (gpioa::PA2<Alternate<AF1>>, gpioa::PA15<Alternate<AF1>>) {}
6565
#[cfg(any(
6666
feature = "stm32f042",
6767
feature = "stm32f030x8",
6868
feature = "stm32f030xc",
6969
))]
70-
impl Pins<USART2> for (gpioa::PA14<Alternate<AF1>>, gpioa::PA15<Alternate<AF1>>) {}
70+
impl Pins<stm32::USART2> for (gpioa::PA14<Alternate<AF1>>, gpioa::PA15<Alternate<AF1>>) {}
7171
#[cfg(any(
7272
feature = "stm32f042",
7373
feature = "stm32f030x8",
7474
feature = "stm32f030xc",
7575
))]
76-
impl Pins<USART2> for (gpioa::PA14<Alternate<AF1>>, gpioa::PA3<Alternate<AF1>>) {}
76+
impl Pins<stm32::USART2> for (gpioa::PA14<Alternate<AF1>>, gpioa::PA3<Alternate<AF1>>) {}
7777

7878
/// Serial abstraction
7979
pub struct Serial<USART, PINS> {
@@ -93,69 +93,63 @@ pub struct Tx<USART> {
9393
usart: *const USART,
9494
}
9595

96-
/// USART1
97-
#[cfg(any(feature = "stm32f042", feature = "stm32f030"))]
98-
impl<PINS> Serial<USART1, PINS> {
99-
pub fn usart1(usart: USART1, pins: PINS, baud_rate: Bps, clocks: Clocks) -> Self
100-
where
101-
PINS: Pins<USART1>,
102-
{
103-
// NOTE(unsafe) This executes only during initialisation
104-
let rcc = unsafe { &(*RCC::ptr()) };
105-
106-
/* Enable clock for USART */
107-
rcc.apb2enr.modify(|_, w| w.usart1en().set_bit());
108-
109-
// Calculate correct baudrate divisor on the fly
110-
let brr = clocks.pclk().0 / baud_rate.0;
111-
usart.brr.write(|w| unsafe { w.bits(brr) });
112-
113-
/* Reset other registers to disable advanced USART features */
114-
usart.cr2.reset();
115-
usart.cr3.reset();
116-
117-
/* Enable transmission and receiving */
118-
usart.cr1.modify(|_, w| unsafe { w.bits(0xD) });
119-
120-
Serial { usart, pins }
96+
macro_rules! usart {
97+
($($USART:ident: ($usart:ident, $usartXen:ident, $apbenr:ident),)+) => {
98+
$(
99+
use crate::stm32::$USART;
100+
impl<PINS> Serial<$USART, PINS> {
101+
pub fn $usart(usart: $USART, pins: PINS, baud_rate: Bps, clocks: Clocks) -> Self
102+
where
103+
PINS: Pins<$USART>,
104+
{
105+
// NOTE(unsafe) This executes only during initialisation
106+
let rcc = unsafe { &(*stm32::RCC::ptr()) };
107+
108+
/* Enable clock for USART */
109+
rcc.$apbenr.modify(|_, w| w.$usartXen().set_bit());
110+
111+
// Calculate correct baudrate divisor on the fly
112+
let brr = clocks.pclk().0 / baud_rate.0;
113+
usart.brr.write(|w| unsafe { w.bits(brr) });
114+
115+
/* Reset other registers to disable advanced USART features */
116+
usart.cr2.reset();
117+
usart.cr3.reset();
118+
119+
/* Enable transmission and receiving */
120+
usart.cr1.modify(|_, w| unsafe { w.bits(0xD) });
121+
122+
Serial { usart, pins }
123+
}
124+
}
125+
)+
121126
}
122127
}
123128

124-
/// USART2
129+
#[cfg(any(feature = "stm32f042", feature = "stm32f030"))]
130+
usart! {
131+
USART1: (usart1, usart1en, apb2enr),
132+
}
125133
#[cfg(any(
126134
feature = "stm32f042",
127135
feature = "stm32f030x8",
128-
feature = "stm32f030x8"
136+
feature = "stm32f030xc"
129137
))]
130-
impl<PINS> Serial<USART2, PINS> {
131-
pub fn usart2(usart: USART2, pins: PINS, baud_rate: Bps, clocks: Clocks) -> Self
132-
where
133-
PINS: Pins<USART2>,
134-
{
135-
// NOTE(unsafe) This executes only during initialisation
136-
let rcc = unsafe { &(*RCC::ptr()) };
137-
138-
/* Enable clock for USART */
139-
rcc.apb1enr.modify(|_, w| w.usart2en().set_bit());
140-
141-
// Calculate correct baudrate divisor on the fly
142-
let brr = clocks.pclk().0 / baud_rate.0;
143-
usart.brr.write(|w| unsafe { w.bits(brr) });
144-
145-
/* Reset other registers to disable advanced USART features */
146-
usart.cr2.reset();
147-
usart.cr3.reset();
148-
149-
/* Enable transmission and receiving */
150-
usart.cr1.modify(|_, w| unsafe { w.bits(0xD) });
151-
152-
Serial { usart, pins }
153-
}
138+
usart! {
139+
USART2: (usart2, usart2en, apb1enr),
140+
}
141+
#[cfg(any(feature = "stm32f030xc"))]
142+
usart! {
143+
USART3: (usart3, usart3en, apb1enr),
144+
USART4: (usart4, usart4en, apb1enr),
145+
USART5: (usart5, usart5en, apb1enr),
146+
// the usart6en bit is missing
147+
// USART6: (usart6, usart6en, apb2enr),
154148
}
155149

156150
// It's s needed for the impls, but rustc doesn't recognize that
157151
#[allow(dead_code)]
158-
type SerialRegisterBlock = usart1::RegisterBlock;
152+
type SerialRegisterBlock = stm32::usart1::RegisterBlock;
159153

160154
impl<USART> embedded_hal::serial::Read<u8> for Rx<USART>
161155
where

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