@@ -572,6 +572,7 @@ gpio!(GPIOC, gpioc, iopcen, PC, [
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feature = "stm32f030" ,
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feature = "stm32f051" ,
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feature = "stm32f070" ,
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+ feature = "stm32f071" ,
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feature = "stm32f072" ,
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feature = "stm32f091" ,
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) ) ]
@@ -599,7 +600,7 @@ gpio!(GPIOD, gpiod, iopden, PD, [
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PD2 : ( pd2, 2 , Input <Floating >) ,
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] ) ;
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- #[ cfg( any( feature = "stm32f072" , feature = "stm32f091" ) ) ]
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+ #[ cfg( any( feature = "stm32f071" , feature = " stm32f072", feature = "stm32f091" ) ) ]
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gpio ! ( GPIOD , gpiod, iopden, PD , [
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PD0 : ( pd0, 0 , Input <Floating >) ,
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PD1 : ( pd1, 1 , Input <Floating >) ,
@@ -622,7 +623,7 @@ gpio!(GPIOD, gpiod, iopden, PD, [
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// TODO: The ST SVD files are missing the entire PE enable register.
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// Re-enable as soon as this gets fixed.
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- // #[cfg(any(feature = "stm32f072", feature = "stm32f091"))]
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+ // #[cfg(any(feature = "stm32f071", feature = " stm32f072", feature = "stm32f091"))]
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// gpio!(GPIOE, gpioe, iopeen, PE, [
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// PE0: (pe0, 0, Input<Floating>),
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// PE1: (pe1, 1, Input<Floating>),
@@ -671,7 +672,7 @@ gpio!(GPIOF, gpiof, iopfen, PF, [
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PF1 : ( pf1, 1 , Input <Floating >) ,
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] ) ;
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- #[ cfg( any( feature = "stm32f072" , feature = "stm32f091" ) ) ]
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+ #[ cfg( any( feature = "stm32f071" , feature = " stm32f072", feature = "stm32f091" ) ) ]
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gpio ! ( GPIOF , gpiof, iopfen, PF , [
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PF0 : ( pf0, 0 , Input <Floating >) ,
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PF1 : ( pf1, 1 , Input <Floating >) ,
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