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therealproftherealprof
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Merge pull request #51 from jessebraham/peripheral-review
Review peripherals and fix inconsistencies
2 parents 81f56fb + 0dccc89 commit cc5dbe0

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6 files changed

+61
-40
lines changed

6 files changed

+61
-40
lines changed

‎Cargo.toml‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,7 @@ edition = "2018"
33
authors = [
44
"Daniel Egger <[email protected]>",
55
"Thomas Bytheway <[email protected]>",
6+
"Jesse Braham <[email protected]>",
67
]
78
categories = [
89
"embedded",

‎src/gpio.rs‎

Lines changed: 17 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -561,7 +561,12 @@ gpio!(GPIOB, gpiob, iopben, PB, [
561561
PB15: (pb15, 15, Input<Floating>),
562562
]);
563563

564-
#[cfg(any(feature = "stm32f038", feature = "stm32f042", feature = "stm32f048"))]
564+
#[cfg(any(
565+
feature = "stm32f031",
566+
feature = "stm32f038",
567+
feature = "stm32f042",
568+
feature = "stm32f048",
569+
))]
565570
gpio!(GPIOC, gpioc, iopcen, PC, [
566571
PC13: (pc13, 13, Input<Floating>),
567572
PC14: (pc14, 14, Input<Floating>),
@@ -634,7 +639,6 @@ gpio!(GPIOD, gpiod, iopden, PD, [
634639

635640
// TODO: The ST SVD files are missing the entire PE enable register.
636641
// Re-enable as soon as this gets fixed.
637-
638642
// #[cfg(any(
639643
// feature = "stm32f071",
640644
// feature = "stm32f072",
@@ -661,7 +665,13 @@ gpio!(GPIOD, gpiod, iopden, PD, [
661665
// PE15: (pe15, 15, Input<Floating>),
662666
// ]);
663667

664-
#[cfg(any(feature = "stm32f030", feature = "stm32f051", feature = "stm32f058"))]
668+
#[cfg(any(
669+
feature = "stm32f030x4",
670+
feature = "stm32f030x6",
671+
feature = "stm32f030x8",
672+
feature = "stm32f051",
673+
feature = "stm32f058",
674+
))]
665675
gpio!(GPIOF, gpiof, iopfen, PF, [
666676
PF0: (pf0, 0, Input<Floating>),
667677
PF1: (pf1, 1, Input<Floating>),
@@ -670,34 +680,24 @@ gpio!(GPIOF, gpiof, iopfen, PF, [
670680
PF6: (pf6, 6, Input<Floating>),
671681
PF7: (pf7, 7, Input<Floating>),
672682
]);
673-
674-
#[cfg(feature = "stm32f031")]
683+
#[cfg(any(feature = "stm32f030xc", feature = "stm32f070"))]
675684
gpio!(GPIOF, gpiof, iopfen, PF, [
676-
PF6: (pf6, 6, Input<Floating>),
677-
PF7: (pf7, 7, Input<Floating>),
685+
PF0: (pf0, 0, Input<Floating>),
686+
PF1: (pf1, 1, Input<Floating>),
678687
]);
679-
680-
#[cfg(feature = "stm32f038")]
688+
#[cfg(any(feature = "stm32f031", feature = "stm32f038"))]
681689
gpio!(GPIOF, gpiof, iopfen, PF, [
682690
PF0: (pf0, 0, Input<Floating>),
683691
PF1: (pf1, 1, Input<Floating>),
684692
PF6: (pf6, 6, Input<Floating>),
685693
PF7: (pf7, 7, Input<Floating>),
686694
]);
687-
688695
#[cfg(any(feature = "stm32f042", feature = "stm32f048"))]
689696
gpio!(GPIOF, gpiof, iopfen, PF, [
690697
PF0: (pf0, 0, Input<Floating>),
691698
PF1: (pf1, 1, Input<Floating>),
692699
PF11: (pf11, 11, Input<Floating>),
693700
]);
694-
695-
#[cfg(feature = "stm32f070")]
696-
gpio!(GPIOF, gpiof, iopfen, PF, [
697-
PF0: (pf0, 0, Input<Floating>),
698-
PF1: (pf1, 1, Input<Floating>),
699-
]);
700-
701701
#[cfg(any(
702702
feature = "stm32f071",
703703
feature = "stm32f072",

‎src/i2c.rs‎

Lines changed: 14 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -55,11 +55,14 @@ i2c_pins! {
5555
}
5656
}
5757
#[cfg(any(
58+
feature = "stm32f030x4",
5859
feature = "stm32f030x6",
5960
feature = "stm32f030xc",
6061
feature = "stm32f031",
62+
feature = "stm32f038",
6163
feature = "stm32f042",
6264
feature = "stm32f048",
65+
feature = "stm32f070x6",
6366
feature = "stm32f091",
6467
feature = "stm32f098",
6568
))]
@@ -77,11 +80,12 @@ i2c_pins! {
7780
}
7881
}
7982
#[cfg(any(
83+
feature = "stm32f030x4",
84+
feature = "stm32f030x6",
8085
feature = "stm32f031",
8186
feature = "stm32f038",
8287
feature = "stm32f042",
8388
feature = "stm32f048",
84-
feature = "stm32f030x6",
8589
))]
8690
i2c_pins! {
8791
I2C1 => {
@@ -96,21 +100,14 @@ i2c_pins! {
96100
sda => [gpiob::PB14<Alternate<AF5>>],
97101
}
98102
}
99-
#[cfg(any(feature = "stm32f042", feature = "stm32f030xc", feature = "stm32f098"))]
100-
i2c_pins! {
101-
I2C1 => {
102-
scl => [gpiof::PF1<Alternate<AF1>>],
103-
sda => [gpiof::PF0<Alternate<AF1>>],
104-
}
105-
}
106-
#[cfg(feature = "stm32f070x6")]
107-
i2c_pins! {
108-
I2C1 => {
109-
scl => [gpioa::PA9<Alternate<AF4>>, gpiof::PF0<Alternate<AF1>>],
110-
sda => [gpioa::PA10<Alternate<AF4>>, gpiof::PF1<Alternate<AF1>>],
111-
}
112-
}
113-
#[cfg(feature = "stm32f091")]
103+
#[cfg(any(
104+
feature = "stm32f030xc",
105+
feature = "stm32f042",
106+
feature = "stm32f048",
107+
feature = "stm32f070x6",
108+
feature = "stm32f091",
109+
feature = "stm32f098",
110+
))]
114111
i2c_pins! {
115112
I2C1 => {
116113
scl => [gpiof::PF1<Alternate<AF1>>],
@@ -182,6 +179,7 @@ i2c! {
182179
}
183180

184181
#[cfg(any(
182+
feature = "stm32f030x8",
185183
feature = "stm32f030xc",
186184
feature = "stm32f051",
187185
feature = "stm32f058",

‎src/serial.rs‎

Lines changed: 17 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -135,7 +135,12 @@ usart_pins! {
135135
rx => [gpioa::PA10<Alternate<AF1>>, gpiob::PB7<Alternate<AF0>>],
136136
}
137137
}
138-
#[cfg(any(feature = "stm32f030x6", feature = "stm32f031", feature = "stm32f038"))]
138+
#[cfg(any(
139+
feature = "stm32f030x4",
140+
feature = "stm32f030x6",
141+
feature = "stm32f031",
142+
feature = "stm32f038",
143+
))]
139144
usart_pins! {
140145
USART1 => {
141146
tx => [gpioa::PA2<Alternate<AF1>>, gpioa::PA14<Alternate<AF1>>],
@@ -164,8 +169,8 @@ usart_pins! {
164169
}
165170
}
166171
#[cfg(any(
167-
feature = "stm32f072",
168172
feature = "stm32f071",
173+
feature = "stm32f072",
169174
feature = "stm32f078",
170175
feature = "stm32f091",
171176
feature = "stm32f098",
@@ -210,10 +215,9 @@ usart_pins! {
210215
rx => [gpiod::PD9<Alternate<AF0>>],
211216
}
212217
}
213-
214218
// TODO: The ST SVD files are missing the entire PE enable register.
215219
// Re-enable as soon as this gets fixed.
216-
// #[cfg(feature = "stm32f091")]
220+
// #[cfg(any(feature = "stm32f091", feature = "stm32f098"))]
217221
// usart_pins! {
218222
// USART4 => {
219223
// tx => [gpioe::PE8<Alternate<AF1>>],
@@ -224,14 +228,21 @@ usart_pins! {
224228
#[cfg(any(feature = "stm32f030xc", feature = "stm32f091", feature = "stm32f098"))]
225229
usart_pins! {
226230
USART5 => {
227-
tx => [gpiob::PB3<Alternate<AF4>>, gpioc::PC12<Alternate<AF2>>],
228-
rx => [gpiob::PB4<Alternate<AF4>>, gpiod::PD2<Alternate<AF2>>],
231+
tx => [gpioc::PC12<Alternate<AF2>>],
232+
rx => [gpiod::PD2<Alternate<AF2>>],
229233
}
230234
USART6 => {
231235
tx => [gpioa::PA4<Alternate<AF5>>, gpioc::PC0<Alternate<AF2>>],
232236
rx => [gpioa::PA5<Alternate<AF5>>, gpioc::PC1<Alternate<AF2>>],
233237
}
234238
}
239+
#[cfg(any(feature = "stm32f030xc", feature = "stm32f091"))]
240+
usart_pins! {
241+
USART5 => {
242+
tx => [gpiob::PB3<Alternate<AF4>>],
243+
rx => [gpiob::PB4<Alternate<AF4>>],
244+
}
245+
}
235246
// TODO: The ST SVD files are missing the entire PE enable register.
236247
// Re-enable as soon as this gets fixed.
237248
#[cfg(any(feature = "stm32f091", feature = "stm32f098"))]

‎src/spi.rs‎

Lines changed: 11 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -49,11 +49,13 @@ use crate::stm32::SPI1;
4949
#[cfg(any(
5050
feature = "stm32f030x8",
5151
feature = "stm32f030xc",
52+
feature = "stm32f042",
5253
feature = "stm32f048",
5354
feature = "stm32f051",
5455
feature = "stm32f058",
5556
feature = "stm32f070xb",
5657
feature = "stm32f071",
58+
feature = "stm32f072",
5759
feature = "stm32f078",
5860
feature = "stm32f091",
5961
feature = "stm32f098",
@@ -116,7 +118,12 @@ spi_pins! {
116118
mosi => [gpioa::PA7<Alternate<AF0>>, gpiob::PB5<Alternate<AF0>>],
117119
}
118120
}
119-
#[cfg(any(feature = "stm32f030x6", feature = "stm32f038"))]
121+
#[cfg(any(
122+
feature = "stm32f030x4",
123+
feature = "stm32f030x6",
124+
feature = "stm32f031",
125+
feature = "stm32f038",
126+
))]
120127
spi_pins! {
121128
SPI1 => {
122129
sck => [gpiob::PB13<Alternate<AF0>>],
@@ -145,6 +152,7 @@ spi_pins! {
145152
#[cfg(any(
146153
feature = "stm32f030x8",
147154
feature = "stm32f030xc",
155+
feature = "stm32f042",
148156
feature = "stm32f048",
149157
feature = "stm32f051",
150158
feature = "stm32f058",
@@ -231,11 +239,13 @@ spi! {
231239
#[cfg(any(
232240
feature = "stm32f030x8",
233241
feature = "stm32f030xc",
242+
feature = "stm32f042",
234243
feature = "stm32f048",
235244
feature = "stm32f051",
236245
feature = "stm32f058",
237246
feature = "stm32f070xb",
238247
feature = "stm32f071",
248+
feature = "stm32f072",
239249
feature = "stm32f078",
240250
feature = "stm32f091",
241251
feature = "stm32f098",

‎src/timers.rs‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -259,6 +259,7 @@ timers! {
259259
#[cfg(any(
260260
feature = "stm32f030xc",
261261
feature = "stm32f070xb",
262+
feature = "stm32f071",
262263
feature = "stm32f072",
263264
feature = "stm32f078",
264265
feature = "stm32f091",

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