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*/
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mod hal_02;
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+ mod hal_1;
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use core:: ops:: Deref ;
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use crate :: pac:: { self , RCC } ;
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- pub use embedded_hal_02:: spi:: { Mode , Phase , Polarity } ;
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use crate :: afio:: MAPR ;
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use crate :: dma:: dma1;
@@ -52,6 +52,33 @@ use crate::time::Hertz;
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use core:: sync:: atomic:: { self , Ordering } ;
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use embedded_dma:: { ReadBuffer , WriteBuffer } ;
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+ /// Clock polarity
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+ #[ derive( Clone , Copy , Debug , PartialEq , Eq ) ]
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+ pub enum Polarity {
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+ /// Clock signal low when idle
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+ IdleLow ,
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+ /// Clock signal high when idle
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+ IdleHigh ,
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+ }
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+
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+ /// Clock phase
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+ #[ derive( Clone , Copy , Debug , PartialEq , Eq ) ]
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+ pub enum Phase {
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+ /// Data in "captured" on the first clock transition
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+ CaptureOnFirstTransition ,
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+ /// Data in "captured" on the second clock transition
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+ CaptureOnSecondTransition ,
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+ }
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+
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+ /// SPI mode
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+ #[ derive( Clone , Copy , Debug , PartialEq , Eq ) ]
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+ pub struct Mode {
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+ /// Clock polarity
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+ pub polarity : Polarity ,
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+ /// Clock phase
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+ pub phase : Phase ,
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+ }
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+
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/// Interrupt event
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pub enum Event {
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/// New data has been received
@@ -601,6 +628,46 @@ where
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}
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}
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+ impl < SPI , REMAP , PINS , FrameSize , OP > Spi < SPI , REMAP , PINS , FrameSize , OP >
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+ where
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+ SPI : Instance ,
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+ FrameSize : Copy ,
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+ {
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+ pub fn read_nonblocking ( & mut self ) -> nb:: Result < FrameSize , Error > {
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+ let sr = self . spi . sr . read ( ) ;
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+
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+ Err ( if sr. ovr ( ) . bit_is_set ( ) {
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+ Error :: Overrun . into ( )
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+ } else if sr. modf ( ) . bit_is_set ( ) {
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+ Error :: ModeFault . into ( )
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+ } else if sr. crcerr ( ) . bit_is_set ( ) {
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+ Error :: Crc . into ( )
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+ } else if sr. rxne ( ) . bit_is_set ( ) {
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+ // NOTE(read_volatile) read only 1 byte (the svd2rust API only allows
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+ // reading a half-word)
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+ return Ok ( self . read_data_reg ( ) ) ;
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+ } else {
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+ nb:: Error :: WouldBlock
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+ } )
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+ }
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+ pub fn write_nonblocking ( & mut self , data : FrameSize ) -> nb:: Result < ( ) , Error > {
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+ let sr = self . spi . sr . read ( ) ;
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+
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+ // NOTE: Error::Overrun was deleted in #408. Need check
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+ Err ( if sr. modf ( ) . bit_is_set ( ) {
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+ Error :: ModeFault . into ( )
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+ } else if sr. crcerr ( ) . bit_is_set ( ) {
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+ Error :: Crc . into ( )
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+ } else if sr. txe ( ) . bit_is_set ( ) {
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+ // NOTE(write_volatile) see note above
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+ self . write_data_reg ( data) ;
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+ return Ok ( ( ) ) ;
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+ } else {
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+ nb:: Error :: WouldBlock
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+ } )
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+ }
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+ }
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+
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// DMA
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pub type SpiTxDma < SPI , REMAP , PINS , OP , CHANNEL > = TxDma < Spi < SPI , REMAP , PINS , u8 , OP > , CHANNEL > ;
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