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Merge pull request #543 from stm32-rs/i2c-f4
backport I2c implementation from f4xx-hal
2 parents cb7cc07 + 6f397c2 commit 5dd7b0f

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CHANGELOG.md

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@@ -20,6 +20,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
2020
- `Spi` now takes `Option<PIN>` for `SCK`, `MISO`, `MOSI` [#514],
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add `SPIx::NoSck`, etc. [#537]
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- `spi::FrameSize` and `embedded-hal` 1.0 implementations
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- Backport `I2c` implementation from `f4xx-hal`
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- move `Qei` mod inside `pwm_input` mod [#516]
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### Changed

Cargo.toml

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@@ -60,6 +60,8 @@ optional = true
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panic-halt = "1.0.0"
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panic-semihosting = "0.6.0"
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panic-itm = "0.4.2"
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panic-probe = "1.0"
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rtt-target = "0.6.1"
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cortex-m-rtic = "1.1.3"
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cortex-m-semihosting = "0.5.0"
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heapless = "0.8.0"

examples/i2c_scanner.rs

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//! Example of using I2C.
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//! Scans available I2C devices on bus and print the result.
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#![no_std]
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#![no_main]
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use panic_probe as _;
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use rtt_target::{rprint, rprintln, rtt_init_print};
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use cortex_m_rt::entry;
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use stm32f1xx_hal::{self as hal, gpio::GpioExt, i2c::I2c, pac, prelude::*};
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const VALID_ADDR_RANGE: core::ops::Range<u8> = 0x08..0x78;
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#[entry]
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fn main() -> ! {
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rtt_init_print!();
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let dp = pac::Peripherals::take().unwrap();
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let mut rcc = dp.RCC.constrain();
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let gpiob = dp.GPIOB.split(&mut rcc);
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// Configure I2C1
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let scl = gpiob.pb6;
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let sda = gpiob.pb7;
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let mut i2c = I2c::new(
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dp.I2C1,
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(scl, sda),
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hal::i2c::Mode::standard(100.kHz()),
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&mut rcc,
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);
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rprintln!("Start i2c scanning...");
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rprintln!();
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for addr in 0x00_u8..0x80 {
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// Write the empty array and check the slave response.
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let byte: [u8; 1] = [0; 1];
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if VALID_ADDR_RANGE.contains(&addr) && i2c.write(addr, &byte).is_ok() {
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rprint!("{:02x}", addr);
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} else {
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rprint!("..");
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}
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if addr % 0x10 == 0x0F {
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rprintln!();
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} else {
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rprint!(" ");
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}
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}
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rprintln!();
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rprintln!("Done!");
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#[allow(clippy::empty_loop)]
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loop {}
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}

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