Add dac

Author: zhangpeng

CHANGELOG.md

@@ -12,6 +12,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Add changelog check on PRs
 - Replace UB code by a legitimate pointer access
 - Reexport `Direction` from `qei`
+- Add dac
 
 ## [v0.10.0] - 2022-12-12
 

Cargo.toml

@@ -61,13 +61,15 @@ stm32f107 = ["stm32f1/stm32f107", "device-selected", "connectivity"]
 # Devices with 64 or 128 Kb ROM
 medium = []
 # Devices with 256 or 512 Kb ROM
-high = ["medium"]
+high = ["medium", "has-dac"]
 # Devices with 768 Kb ROM or more
 xl = ["high"]
 # Connectivity line devices (`stm32f105xx` and `stm32f107xx`)
-connectivity = ["medium", "has-can"]
+connectivity = ["medium", "has-can", "has-dac"]
 # Devices with CAN interface
 has-can = []
+# Devices with Dac
+has-dac = []
 
 rtic = ["rtic-monotonic"]
 

src/dac.rs

@@ -0,0 +1,105 @@
+//! # API for the Digital to Analog converter
+//!
+//! Currently only supports writing to the DR of the DAC,
+//! just a basic one-shot conversion.
+#![deny(unused_imports)]
+
+use crate::{
+    gpio::{Analog, PA4, PA5},
+    pac::{DAC, RCC},
+    rcc::{Enable, Reset},
+};
+
+pub struct C1;
+pub struct C2;
+
+pub trait DacOut<V> {
+    fn set_value(&mut self, val: V);
+    fn get_value(&mut self) -> V;
+}
+
+pub trait DacPin {
+    fn enable(&mut self);
+}
+
+pub trait Pins<DAC> {
+    type Output;
+    #[doc(hidden)]
+    fn init() -> Self::Output;
+}
+
+impl Pins<DAC> for PA4<Analog> {
+    type Output = C1;
+    fn init() -> Self::Output {
+        C1
+    }
+}
+
+impl Pins<DAC> for PA5<Analog> {
+    type Output = C2;
+    fn init() -> Self::Output {
+        C2
+    }
+}
+
+impl Pins<DAC> for (PA4<Analog>, PA5<Analog>) {
+    type Output = (C1, C2);
+    fn init() -> Self::Output {
+        (C1, C2)
+    }
+}
+
+pub fn dac<PINS>(_dac: DAC, _pins: PINS) -> PINS::Output
+where
+    PINS: Pins<DAC>,
+{
+    unsafe {
+        // Enable and reset clock.
+        let rcc = unsafe { &(*RCC::ptr()) };
+        DAC::enable(rcc);
+        DAC::reset(rcc);
+
+        PINS::init()
+    }
+}
+
+macro_rules! dac {
+    ($CX:ident, $en:ident, $cen:ident, $cal_flag:ident, $trim:ident, $mode:ident, $dhrx:ident, $dac_dor:ident, $daccxdhr:ident) => {
+        impl DacPin for $CX {
+            fn enable(&mut self) {
+                let dac = unsafe { &(*DAC::ptr()) };
+                dac.cr.modify(|_, w| w.$en().set_bit());
+            }
+        }
+
+        impl DacOut<u16> for $CX {
+            fn set_value(&mut self, val: u16) {
+                let dac = unsafe { &(*DAC::ptr()) };
+                dac.$dhrx.write(|w| unsafe { w.bits(val as u32) });
+            }
+
+            fn get_value(&mut self) -> u16 {
+                let dac = unsafe { &(*DAC::ptr()) };
+                dac.$dac_dor.read().bits() as u16
+            }
+        }
+    };
+}
+
+pub trait DacExt {
+    fn constrain<PINS>(self, pins: PINS) -> PINS::Output
+    where
+        PINS: Pins<DAC>;
+}
+
+impl DacExt for DAC {
+    fn constrain<PINS>(self, pins: PINS) -> PINS::Output
+    where
+        PINS: Pins<DAC>,
+    {
+        dac(self, pins)
+    }
+}
+
+dac!(C1, en1, cen1, cal_flag1, otrim1, mode1, dhr12r1, dor1, dacc1dhr);
+dac!(C2, en2, cen2, cal_flag2, otrim2, mode2, dhr12r2, dor2, dacc2dhr);

src/lib.rs

@@ -150,6 +150,8 @@ pub mod bb;
 pub mod can;
 #[cfg(feature = "device-selected")]
 pub mod crc;
+#[cfg(all(feature = "device-selected", feature = "has-dac"))]
+pub mod dac;
 #[cfg(feature = "device-selected")]
 pub mod dma;
 #[cfg(feature = "device-selected")]

src/rcc/enable.rs

@@ -73,10 +73,13 @@ bus! {
     CAN1 => (APB1, 25),
     CAN2 => (APB1, 26),
 }
+#[cfg(feature = "has-dac")]
+bus! {
+    DAC => (APB1, 29),
+}
 #[cfg(all(feature = "stm32f103", feature = "high"))]
 bus! {
     ADC3 => (APB2, 15),
-    DAC => (APB1, 29),
     UART4 => (APB1, 19),
     UART5 => (APB1, 20),
 }