55use panic_semihosting as _;
66
77use cortex_m_rt:: entry;
8- use stm32f1xx_hal:: { pac, prelude:: * } ;
8+ use stm32f1xx_hal:: { pac, prelude:: * , rcc } ;
99
1010use cortex_m_semihosting:: hprintln;
1111
@@ -14,31 +14,34 @@ fn main() -> ! {
1414 // Acquire peripherals
1515 let p = pac:: Peripherals :: take ( ) . unwrap ( ) ;
1616 let mut flash = p. FLASH . constrain ( ) ;
17- let rcc = p. RCC . constrain ( ) ;
18-
19- let clocks = rcc
20- . cfgr
21- . use_hse ( 8 . MHz ( ) )
22- . sysclk ( 56 . MHz ( ) )
23- . pclk1 ( 28 . MHz ( ) )
24- . adcclk ( 14 . MHz ( ) )
25- . freeze ( & mut flash. acr ) ;
17+ let mut rcc = p. RCC . freeze (
18+ rcc:: Config :: hse ( 8 . MHz ( ) )
19+ . sysclk ( 56 . MHz ( ) )
20+ . pclk1 ( 28 . MHz ( ) )
21+ . adcclk ( 14 . MHz ( ) ) ,
22+ & mut flash. acr ,
23+ ) ;
24+
2625 /*
2726 // Alternative configuration using dividers and multipliers directly
28- let clocks = rcc.cfgr.freeze_with_config(rcc::Config {
29- hse: Some(8_000_000),
30- pllmul: Some(7),
31- hpre: rcc::HPre::DIV1,
32- ppre1: rcc::PPre::DIV2,
33- ppre2: rcc::PPre::DIV1,
34- usbpre: rcc::UsbPre::DIV1_5,
35- adcpre: rcc::AdcPre::DIV2,
36- }, &mut flash.acr);*/
37- hprintln ! ( "sysclk freq: {}" , clocks. sysclk( ) ) ;
38- hprintln ! ( "adc freq: {}" , clocks. adcclk( ) ) ;
27+ let rcc = p.RCC.freeze_raw(
28+ rcc::RawConfig {
29+ hse: Some(8_000_000),
30+ pllmul: Some(7),
31+ hpre: rcc::HPre::Div1,
32+ ppre1: rcc::PPre::Div2,
33+ ppre2: rcc::PPre::Div1,
34+ usbpre: rcc::UsbPre::Div1_5,
35+ adcpre: rcc::AdcPre::Div2,
36+ ..Default::default()
37+ },
38+ &mut flash.acr,
39+ );*/
40+ hprintln ! ( "sysclk freq: {}" , rcc. clocks. sysclk( ) ) ;
41+ hprintln ! ( "adc freq: {}" , rcc. clocks. adcclk( ) ) ;
3942
4043 // Setup ADC
41- let mut adc = p. ADC1 . adc ( & clocks ) ;
44+ let mut adc = p. ADC1 . adc ( & mut rcc ) ;
4245
4346 // Read temperature sensor
4447 loop {
0 commit comments