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Merge pull request #453 from Bobo1239/master
Don't overwrite other bits when enabling a PWM timer
2 parents 4fb91ea + 502752b commit d0991c6

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CHANGELOG.md

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@@ -40,6 +40,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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- `Serial::usart1/2/3` -> `Serial::new`.
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- `Serial` implements `Write<WORD>` and `Read<WORD>` for `WORD` simultaneously as u8 and u16.
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- Bump bxcan version to [v0.7.0](https://github.com/stm32-rs/bxcan/releases/tag/v0.7.0)
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- PWM timer auto reload value is now preloaded/buffered
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### Added
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src/timer.rs

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@@ -400,7 +400,7 @@ macro_rules! hal {
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}
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#[inline(always)]
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fn start_one_pulse(&mut self) {
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self.cr1.write(|w| unsafe { w.bits(1 << 3) }.cen().set_bit());
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self.cr1.modify(|_, w| w.opm().set_bit().cen().set_bit());
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}
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#[inline(always)]
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fn cr1_reset(&mut self) {
@@ -460,7 +460,7 @@ macro_rules! with_pwm {
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#[inline(always)]
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fn start_pwm(&mut self) {
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self.cr1.write(|w| w.cen().set_bit());
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self.cr1.modify(|_, w| w.cen().set_bit());
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}
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#[inline(always)]
@@ -512,7 +512,7 @@ macro_rules! with_pwm {
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#[inline(always)]
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fn start_pwm(&mut self) {
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self.cr1.write(|w| w.cen().set_bit());
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self.cr1.modify(|_, w| w.cen().set_bit());
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}
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#[inline(always)]
@@ -565,7 +565,7 @@ macro_rules! with_pwm {
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#[inline(always)]
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fn start_pwm(&mut self) {
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$(let $aoe = self.bdtr.modify(|_, w| w.aoe().set_bit());)?
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self.cr1.write(|w| w.cen().set_bit());
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self.cr1.modify(|_, w| w.cen().set_bit());
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}
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#[inline(always)]

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