diff --git a/CHANGELOG.md b/CHANGELOG.md
index 719667b5..54e771c9 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -11,10 +11,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 - Relax pin type generics for `Serial`, `I2c`, `Spi`, `Can`. [#462]
   Use enums of pin tuples and `Enum::from<(tuple)>` for pin remap before passing to peripheral.
-  Remove `RemapStruct`s. [#462]
+  Remove `RemapStruct`s. [#462] [#506]
 - Use independent `Spi` and `SpiSlave` structures instead of `OP` generic [#462]
 - Take `&Clocks` instead of `Clocks` [#498]
-- Temporary replace `stm32f1` with `stm32f1-staging`
+- Temporary replace `stm32f1` with `stm32f1-staging` [#503]
 
 ### Changed
 
@@ -23,8 +23,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Replace UB code by a legitimate pointer access [#480]
 - Fix flash error flag clearing [#489]
 - Clarify README for windows users [#496]
-- Check "device selected" in `build.rs`
-- Unmacro `dma.rs`
+- Check "device selected" in `build.rs` [#502]
+- Use gpio field enums internally [#506]
+- Unmacro `dma.rs` [#505]
 
 ### Added
 
@@ -35,6 +36,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Reexport `Direction` from `qei` [#479]
 - Add DAC [#483]
 - Add an option to allow overclocking [#494]
+- `new` on gpio mode [#506]
 
 [#416]: https://github.com/stm32-rs/stm32f1xx-hal/pull/416
 [#453]: https://github.com/stm32-rs/stm32f1xx-hal/pull/453
@@ -48,6 +50,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 [#494]: https://github.com/stm32-rs/stm32f1xx-hal/pull/494
 [#496]: https://github.com/stm32-rs/stm32f1xx-hal/pull/496
 [#498]: https://github.com/stm32-rs/stm32f1xx-hal/pull/498
+[#502]: https://github.com/stm32-rs/stm32f1xx-hal/pull/502
+[#503]: https://github.com/stm32-rs/stm32f1xx-hal/pull/503
+[#505]: https://github.com/stm32-rs/stm32f1xx-hal/pull/505
+[#506]: https://github.com/stm32-rs/stm32f1xx-hal/pull/506
 
 ## [v0.10.0] - 2022-12-12
 
diff --git a/examples/blinky_timer_irq.rs b/examples/blinky_timer_irq.rs
index c3a8f9f7..8350f0da 100644
--- a/examples/blinky_timer_irq.rs
+++ b/examples/blinky_timer_irq.rs
@@ -15,7 +15,7 @@ use panic_halt as _;
 use stm32f1xx_hal as hal;
 
 use crate::hal::{
-    gpio::{gpioc, Output, PushPull},
+    gpio::{gpioc, Output, PinState, PushPull},
     pac::{interrupt, Interrupt, Peripherals, TIM2},
     prelude::*,
     timer::{CounterMs, Event},
@@ -79,8 +79,9 @@ fn main() -> ! {
 
     // Configure PC13 pin to blink LED
     let mut gpioc = dp.GPIOC.split();
-    let mut led = gpioc.pc13.into_push_pull_output(&mut gpioc.crh);
-    let _ = led.set_high(); // Turn off
+    let led = Output::new(gpioc.pc13, &mut gpioc.crh, PinState::High);
+    //or
+    //let led = gpioc.pc13.into_push_pull_output_with_state(&mut gpioc.crh, PinState::High);
 
     // Move the pin into our global storage
     cortex_m::interrupt::free(|cs| *G_LED.borrow(cs).borrow_mut() = Some(led));
diff --git a/examples/can-echo.rs b/examples/can-echo.rs
index ac0da945..670a6784 100644
--- a/examples/can-echo.rs
+++ b/examples/can-echo.rs
@@ -10,7 +10,7 @@ use panic_halt as _;
 use bxcan::filter::Mask32;
 use cortex_m_rt::entry;
 use nb::block;
-use stm32f1xx_hal::{gpio::Floating, pac, prelude::*};
+use stm32f1xx_hal::{pac, prelude::*};
 
 #[entry]
 fn main() -> ! {
@@ -31,7 +31,7 @@ fn main() -> ! {
         let rx = gpioa.pa11;
         let tx = gpioa.pa12;
 
-        let can = dp.CAN1.can::<Floating>(
+        let can = dp.CAN1.can(
             #[cfg(not(feature = "connectivity"))]
             dp.USB,
             (tx, rx, &mut afio.mapr),
@@ -51,9 +51,7 @@ fn main() -> ! {
     #[cfg(feature = "connectivity")]
     let _can2 = {
         let gpiob = dp.GPIOB.split();
-        let can = dp
-            .CAN2
-            .can::<Floating>((gpiob.pb6, gpiob.pb5, &mut afio.mapr));
+        let can = dp.CAN2.can((gpiob.pb6, gpiob.pb5, &mut afio.mapr));
 
         // APB1 (PCLK1): 8MHz, Bit rate: 125kBit/s, Sample Point 87.5%
         // Value was calculated with http://www.bittiming.can-wiki.info/
diff --git a/examples/serial_9bits.rs b/examples/serial_9bits.rs
index 043587da..e4e3b3b6 100644
--- a/examples/serial_9bits.rs
+++ b/examples/serial_9bits.rs
@@ -13,10 +13,9 @@ use cortex_m_rt::entry;
 use nb::block;
 use panic_halt as _;
 use stm32f1xx_hal::{
-    gpio::{Floating, PushPull},
     pac,
     prelude::*,
-    serial::{self, Config, Error, Serial},
+    serial::{self, Config, Error},
 };
 
 // The address of the slave device.
@@ -119,8 +118,10 @@ fn main() -> ! {
 
     // Set up the usart device. Take ownership over the USART register and tx/rx pins. The rest of
     // the registers are used to enable and configure the device.
-    let serial = Serial::<_, PushPull, Floating>::new(
-        p.USART3,
+    //
+    //let serial = Serial::<_, PushPull, Floating>::new(p.USART3,
+    // or shorter
+    let serial = p.USART3.serial(
         (tx_pin, rx_pin, &mut afio.mapr),
         Config::default()
             .baudrate(9600.bps())
diff --git a/examples/spi-slave.rs b/examples/spi-slave.rs
index e322bab3..0f7ae712 100644
--- a/examples/spi-slave.rs
+++ b/examples/spi-slave.rs
@@ -20,7 +20,6 @@ pub const MODE: Mode = Mode {
 };
 
 use stm32f1xx_hal::{
-    gpio::Floating,
     pac::{self, interrupt, Peripherals, SPI2},
     prelude::*,
     spi::{Event, SpiSlave},
@@ -49,7 +48,7 @@ fn main() -> ! {
 
     let spi1 = dp
         .SPI1
-        .spi::<Floating>((sck, miso, mosi, &mut afio.mapr), MODE, 10.kHz(), &clocks);
+        .spi((sck, miso, mosi, &mut afio.mapr), MODE, 10.kHz(), &clocks);
 
     // SPI2
     // Convert pins before SPI initialization
diff --git a/src/adc.rs b/src/adc.rs
index e79c911b..ca69c3e4 100644
--- a/src/adc.rs
+++ b/src/adc.rs
@@ -400,11 +400,10 @@ macro_rules! adc_hal {
                     self.rb.sqr3().modify(|_, w| unsafe { w.sq1().bits(chan) });
 
                     // ADC start conversion of regular sequence
-                    self.rb.cr2().modify(|_, w|
-                        w
-                            .swstart().set_bit()
-                            .align().bit(self.align.into())
-                    );
+                    self.rb.cr2().modify(|_, w| {
+                        w.swstart().set_bit();
+                        w.align().bit(self.align.into())
+                    });
                     while self.rb.cr2().read().swstart().bit_is_set() {}
                     // ADC wait for conversion results
                     while self.rb.sr().read().eoc().bit_is_clear() {}
@@ -680,14 +679,10 @@ macro_rules! adcdma {
                 Self: SetChannels<PINS>,
             {
                 self.rb.cr2().modify(|_, w| {
-                    w.adon()
-                        .clear_bit()
-                        .dma()
-                        .clear_bit()
-                        .cont()
-                        .clear_bit()
-                        .align()
-                        .bit(self.align.into())
+                    w.adon().clear_bit();
+                    w.dma().clear_bit();
+                    w.cont().clear_bit();
+                    w.align().bit(self.align.into())
                 });
                 self.rb
                     .cr1()
@@ -761,18 +756,12 @@ macro_rules! adcdma {
                 atomic::compiler_fence(Ordering::Release);
 
                 self.channel.ch().cr().modify(|_, w| {
-                    w.mem2mem()
-                        .clear_bit()
-                        .pl()
-                        .medium()
-                        .msize()
-                        .bits16()
-                        .psize()
-                        .bits16()
-                        .circ()
-                        .set_bit()
-                        .dir()
-                        .clear_bit()
+                    w.mem2mem().clear_bit();
+                    w.pl().medium();
+                    w.msize().bits16();
+                    w.psize().bits16();
+                    w.circ().set_bit();
+                    w.dir().clear_bit()
                 });
 
                 self.start();
@@ -799,18 +788,12 @@ macro_rules! adcdma {
 
                 atomic::compiler_fence(Ordering::Release);
                 self.channel.ch().cr().modify(|_, w| {
-                    w.mem2mem()
-                        .clear_bit()
-                        .pl()
-                        .medium()
-                        .msize()
-                        .bits16()
-                        .psize()
-                        .bits16()
-                        .circ()
-                        .clear_bit()
-                        .dir()
-                        .clear_bit()
+                    w.mem2mem().clear_bit();
+                    w.pl().medium();
+                    w.msize().bits16();
+                    w.psize().bits16();
+                    w.circ().clear_bit();
+                    w.dir().clear_bit()
                 });
                 self.start();
 
diff --git a/src/can.rs b/src/can.rs
index 0543ab42..5ad0c3bc 100644
--- a/src/can.rs
+++ b/src/can.rs
@@ -122,23 +122,23 @@ macro_rules! remap {
 use remap;
 
 pub trait CanExt: Sized + Instance {
-    fn can<PULL>(
+    fn can(
         self,
         #[cfg(not(feature = "connectivity"))] usb: pac::USB,
-        pins: impl Into<Self::Pins<PULL>>,
-    ) -> Can<Self, PULL>;
-    fn can_loopback<PULL>(
+        pins: impl Into<Self::Pins<Floating>>,
+    ) -> Can<Self, Floating>;
+    fn can_loopback(
         self,
         #[cfg(not(feature = "connectivity"))] usb: pac::USB,
-    ) -> Can<Self, PULL>;
+    ) -> Can<Self, Floating>;
 }
 
 impl<CAN: Instance> CanExt for CAN {
-    fn can<PULL>(
+    fn can(
         self,
         #[cfg(not(feature = "connectivity"))] usb: pac::USB,
-        pins: impl Into<Self::Pins<PULL>>,
-    ) -> Can<Self, PULL> {
+        pins: impl Into<Self::Pins<Floating>>,
+    ) -> Can<Self, Floating> {
         Can::new(
             self,
             #[cfg(not(feature = "connectivity"))]
@@ -146,10 +146,10 @@ impl<CAN: Instance> CanExt for CAN {
             pins,
         )
     }
-    fn can_loopback<PULL>(
+    fn can_loopback(
         self,
         #[cfg(not(feature = "connectivity"))] usb: pac::USB,
-    ) -> Can<Self, PULL> {
+    ) -> Can<Self, Floating> {
         Can::new_loopback(
             self,
             #[cfg(not(feature = "connectivity"))]
diff --git a/src/gpio.rs b/src/gpio.rs
index 9abb5b8e..05be3321 100644
--- a/src/gpio.rs
+++ b/src/gpio.rs
@@ -82,7 +82,7 @@ use crate::pac::EXTI;
 mod partially_erased;
 pub use partially_erased::{PEPin, PartiallyErasedPin};
 mod erased;
-pub use erased::{EPin, ErasedPin};
+pub use erased::{AnyPin, ErasedPin};
 
 mod hal_02;
 mod hal_1;
@@ -99,6 +99,16 @@ pub enum IOPinSpeed {
     Mhz50 = 0b11,
 }
 
+impl From<IOPinSpeed> for Mode {
+    fn from(value: IOPinSpeed) -> Self {
+        match value {
+            IOPinSpeed::Mhz10 => Self::Output,
+            IOPinSpeed::Mhz2 => Self::Output2,
+            IOPinSpeed::Mhz50 => Self::Output50,
+        }
+    }
+}
+
 pub trait PinExt {
     type Mode;
 
@@ -140,7 +150,7 @@ pub trait Active {}
 #[derive(Default)]
 pub struct Input<PULL = Floating>(PhantomData<PULL>);
 
-impl<MODE> Active for Input<MODE> {}
+impl<PULL> Active for Input<PULL> {}
 
 /// Used by the debugger (type state)
 #[derive(Default)]
@@ -202,12 +212,14 @@ mod sealed {
     pub trait Interruptable {}
 
     pub trait PinMode: Default {
-        const CNF: u32;
-        const MODE: u32;
+        const CNF: super::Cnf;
+        const MODE: super::Mode;
         const PULL: Option<bool> = None;
     }
 }
 
+use crate::pac::gpioa::crl::{CNF0 as Cnf, MODE0 as Mode};
+
 use sealed::Interruptable;
 pub(crate) use sealed::PinMode;
 
@@ -270,10 +282,10 @@ where
                     .modify(|r, w| unsafe { w.bits(r.bits() & !(1 << pin_number)) });
             }
             Edge::Falling => {
-                exti.ftsr()
-                    .modify(|r, w| unsafe { w.bits(r.bits() | (1 << pin_number)) });
                 exti.rtsr()
                     .modify(|r, w| unsafe { w.bits(r.bits() & !(1 << pin_number)) });
+                exti.ftsr()
+                    .modify(|r, w| unsafe { w.bits(r.bits() | (1 << pin_number)) });
             }
             Edge::RisingFalling => {
                 exti.rtsr()
@@ -439,10 +451,6 @@ pub struct Pin<const P: char, const N: u8, MODE = Input<Floating>> {
     mode: MODE,
 }
 
-impl<const P: char, const N: u8, MODE> Pin<P, N, MODE> {
-    const OFFSET: u32 = (4 * (N as u32)) % 32;
-}
-
 /// Represents high or low configuration register
 pub trait HL {
     /// Configuration register associated to pin
@@ -518,25 +526,29 @@ impl<const P: char, const N: u8, MODE> Pin<P, N, MODE> {
     #[inline(always)]
     fn _set_high(&mut self) {
         // NOTE(unsafe) atomic write to a stateless register
-        unsafe { (*Gpio::<P>::ptr()).bsrr().write(|w| w.bits(1 << N)) }
+        let gpio = unsafe { &(*gpiox::<P>()) };
+        gpio.bsrr().write(|w| w.bs(N).set_bit())
     }
 
     #[inline(always)]
     fn _set_low(&mut self) {
         // NOTE(unsafe) atomic write to a stateless register
-        unsafe { (*Gpio::<P>::ptr()).bsrr().write(|w| w.bits(1 << (16 + N))) }
+        let gpio = unsafe { &(*gpiox::<P>()) };
+        gpio.bsrr().write(|w| w.br(N).set_bit())
     }
 
     #[inline(always)]
     fn _is_set_low(&self) -> bool {
         // NOTE(unsafe) atomic read with no side effects
-        unsafe { (*Gpio::<P>::ptr()).odr().read().bits() & (1 << N) == 0 }
+        let gpio = unsafe { &(*gpiox::<P>()) };
+        gpio.odr().read().odr(N).bit_is_clear()
     }
 
     #[inline(always)]
     fn _is_low(&self) -> bool {
         // NOTE(unsafe) atomic read with no side effects
-        unsafe { (*Gpio::<P>::ptr()).idr().read().bits() & (1 << N) == 0 }
+        let gpio = unsafe { &(*gpiox::<P>()) };
+        gpio.idr().read().idr(N).bit_is_clear()
     }
 }
 
@@ -816,26 +828,20 @@ where
     Self: HL,
 {
     #[inline(always)]
-    fn cr_modify(&mut self, _cr: &mut <Self as HL>::Cr, f: impl FnOnce(u32) -> u32) {
-        let gpio = unsafe { &(*Gpio::<P>::ptr()) };
+    fn _set_speed(&mut self, _cr: &mut <Self as HL>::Cr, speed: IOPinSpeed) {
+        let gpio = unsafe { &(*gpiox::<P>()) };
 
         match N {
             0..=7 => {
-                gpio.crl().modify(|r, w| unsafe { w.bits(f(r.bits())) });
+                gpio.crl().modify(|_, w| w.mode(N).variant(speed.into()));
             }
             8..=15 => {
-                gpio.crh().modify(|r, w| unsafe { w.bits(f(r.bits())) });
+                gpio.crh()
+                    .modify(|_, w| unsafe { w.mode(N - 16).bits(speed as u8) });
             }
             _ => unreachable!(),
         }
     }
-
-    #[inline(always)]
-    fn _set_speed(&mut self, cr: &mut <Self as HL>::Cr, speed: IOPinSpeed) {
-        self.cr_modify(cr, |r_bits| {
-            (r_bits & !(0b11 << Self::OFFSET)) | ((speed as u32) << Self::OFFSET)
-        });
-    }
 }
 
 impl<const P: char, const N: u8, MODE> OutputSpeed for Pin<P, N, Output<MODE>>
@@ -898,69 +904,79 @@ where
     }
 }
 
+impl PinMode for Analog {
+    const MODE: Mode = Mode::Input;
+    const CNF: Cnf = Cnf::PushPull;
+}
+
 impl PinMode for Input<Floating> {
-    const CNF: u32 = 0b01;
-    const MODE: u32 = 0b00;
+    const MODE: Mode = Mode::Input;
+    const CNF: Cnf = Cnf::OpenDrain;
 }
 
 impl PinMode for Input<PullDown> {
-    const CNF: u32 = 0b10;
-    const MODE: u32 = 0b00;
+    const MODE: Mode = Mode::Input;
+    const CNF: Cnf = Cnf::AltPushPull;
     const PULL: Option<bool> = Some(false);
 }
 
 impl PinMode for Input<PullUp> {
-    const CNF: u32 = 0b10;
-    const MODE: u32 = 0b00;
+    const MODE: Mode = Mode::Input;
+    const CNF: Cnf = Cnf::AltPushPull;
     const PULL: Option<bool> = Some(true);
 }
 
-impl PinMode for Output<OpenDrain> {
-    const CNF: u32 = 0b01;
-    const MODE: u32 = 0b11;
-}
-
 impl PinMode for Output<PushPull> {
-    const CNF: u32 = 0b00;
-    const MODE: u32 = 0b11;
+    const MODE: Mode = Mode::Output50;
+    const CNF: Cnf = Cnf::PushPull;
 }
 
-impl PinMode for Analog {
-    const CNF: u32 = 0b00;
-    const MODE: u32 = 0b00;
+impl PinMode for Output<OpenDrain> {
+    const MODE: Mode = Mode::Output50;
+    const CNF: Cnf = Cnf::OpenDrain;
 }
 
 impl PinMode for Alternate<PushPull> {
-    const CNF: u32 = 0b10;
-    const MODE: u32 = 0b11;
+    const MODE: Mode = Mode::Output50;
+    const CNF: Cnf = Cnf::AltPushPull;
 }
 
 impl PinMode for Alternate<OpenDrain> {
-    const CNF: u32 = 0b11;
-    const MODE: u32 = 0b11;
+    const MODE: Mode = Mode::Output50;
+    const CNF: Cnf = Cnf::AltOpenDrain;
 }
 
 impl<const P: char, const N: u8, M> Pin<P, N, M>
 where
     Self: HL,
 {
-    fn mode<MODE: PinMode>(&mut self, cr: &mut <Self as HL>::Cr) {
-        let gpio = unsafe { &(*Gpio::<P>::ptr()) };
+    fn mode<MODE: PinMode>(&mut self, _cr: &mut <Self as HL>::Cr) {
+        let gpio = unsafe { &(*gpiox::<P>()) };
 
         // Input<PullUp> or Input<PullDown> mode
         if let Some(pull) = MODE::PULL {
-            if pull {
-                gpio.bsrr().write(|w| unsafe { w.bits(1 << N) });
-            } else {
-                gpio.bsrr().write(|w| unsafe { w.bits(1 << (16 + N)) });
-            }
+            gpio.bsrr().write(|w| {
+                if pull {
+                    w.bs(N).set_bit()
+                } else {
+                    w.br(N).set_bit()
+                }
+            })
         }
 
-        let bits = (MODE::CNF << 2) | MODE::MODE;
-
-        self.cr_modify(cr, |r_bits| {
-            (r_bits & !(0b1111 << Self::OFFSET)) | (bits << Self::OFFSET)
-        });
+        match N {
+            0..=7 => {
+                gpio.crl()
+                    .modify(|_, w| w.mode(N).variant(MODE::MODE).cnf(N).variant(MODE::CNF));
+            }
+            8..=15 => {
+                gpio.crh().modify(|_, w| unsafe {
+                    w.mode(N - 16).bits(MODE::MODE as u8);
+                    w.cnf(N - 16).bits(MODE::CNF as u8)
+                });
+            }
+            _ => unreachable!(),
+        }
     }
 
     #[inline]
@@ -970,6 +986,61 @@ where
     }
 }
 
+impl Analog {
+    pub fn new<const P: char, const N: u8, MODE>(
+        pin: Pin<P, N, MODE>,
+        cr: &mut <Pin<P, N, MODE> as HL>::Cr,
+    ) -> Pin<P, N, Self>
+    where
+        Pin<P, N, MODE>: HL,
+        Self: PinMode,
+    {
+        pin.into_mode(cr)
+    }
+}
+
+impl<PULL> Input<PULL> {
+    pub fn new<const P: char, const N: u8, MODE>(
+        pin: Pin<P, N, MODE>,
+        cr: &mut <Pin<P, N, MODE> as HL>::Cr,
+        _pull: PULL,
+    ) -> Pin<P, N, Self>
+    where
+        Pin<P, N, MODE>: HL,
+        Self: PinMode,
+    {
+        pin.into_mode(cr)
+    }
+}
+
+impl<Otype> Output<Otype> {
+    pub fn new<const P: char, const N: u8, MODE>(
+        mut pin: Pin<P, N, MODE>,
+        cr: &mut <Pin<P, N, MODE> as HL>::Cr,
+        state: PinState,
+    ) -> Pin<P, N, Self>
+    where
+        Pin<P, N, MODE>: HL,
+        Self: PinMode,
+    {
+        pin._set_state(state);
+        pin.into_mode(cr)
+    }
+}
+
+impl<Otype> Alternate<Otype> {
+    pub fn new<const P: char, const N: u8, MODE>(
+        pin: Pin<P, N, MODE>,
+        cr: &mut <Pin<P, N, MODE> as HL>::Cr,
+    ) -> Pin<P, N, Self>
+    where
+        Pin<P, N, MODE>: HL,
+        Self: PinMode,
+    {
+        pin.into_mode(cr)
+    }
+}
+
 gpio!(GPIOA, gpioa, PAx, 'A', [
     PA0: (pa0, 0),
     PA1: (pa1, 1),
@@ -1105,20 +1176,17 @@ gpio!(GPIOG, gpiog, PGx, 'G', [
     PG15: (pg15, 15),
 ]);
 
-struct Gpio<const P: char>;
-impl<const P: char> Gpio<P> {
-    const fn ptr() -> *const crate::pac::gpioa::RegisterBlock {
-        match P {
-            'A' => crate::pac::GPIOA::ptr(),
-            'B' => crate::pac::GPIOB::ptr() as _,
-            'C' => crate::pac::GPIOC::ptr() as _,
-            'D' => crate::pac::GPIOD::ptr() as _,
-            'E' => crate::pac::GPIOE::ptr() as _,
-            #[cfg(any(feature = "xl", feature = "high"))]
-            'F' => crate::pac::GPIOF::ptr() as _,
-            #[cfg(any(feature = "xl", feature = "high"))]
-            'G' => crate::pac::GPIOG::ptr() as _,
-            _ => unreachable!(),
-        }
+const fn gpiox<const P: char>() -> *const crate::pac::gpioa::RegisterBlock {
+    match P {
+        'A' => crate::pac::GPIOA::ptr(),
+        'B' => crate::pac::GPIOB::ptr() as _,
+        'C' => crate::pac::GPIOC::ptr() as _,
+        'D' => crate::pac::GPIOD::ptr() as _,
+        'E' => crate::pac::GPIOE::ptr() as _,
+        #[cfg(any(feature = "xl", feature = "high"))]
+        'F' => crate::pac::GPIOF::ptr() as _,
+        #[cfg(any(feature = "xl", feature = "high"))]
+        'G' => crate::pac::GPIOG::ptr() as _,
+        _ => unreachable!(),
     }
 }
diff --git a/src/gpio/erased.rs b/src/gpio/erased.rs
index 7b38079c..f09bff71 100644
--- a/src/gpio/erased.rs
+++ b/src/gpio/erased.rs
@@ -1,6 +1,6 @@
 use super::*;
 
-pub type EPin<MODE> = ErasedPin<MODE>;
+pub type AnyPin<MODE> = ErasedPin<MODE>;
 
 macro_rules! impl_pxx {
     ($(($port_id:literal :: $pin:ident)),*) => {
diff --git a/src/gpio/partially_erased.rs b/src/gpio/partially_erased.rs
index b3153e0e..4aef818b 100644
--- a/src/gpio/partially_erased.rs
+++ b/src/gpio/partially_erased.rs
@@ -38,21 +38,15 @@ impl<const P: char, MODE> PartiallyErasedPin<P, Output<MODE>> {
     #[inline(always)]
     pub fn set_high(&mut self) {
         // NOTE(unsafe) atomic write to a stateless register
-        unsafe {
-            (*Gpio::<P>::ptr())
-                .bsrr()
-                .write(|w| w.bits(1 << self.pin_number))
-        }
+        let gpio = unsafe { &(*gpiox::<P>()) };
+        gpio.bsrr().write(|w| w.bs(self.pin_number).set_bit());
     }
 
     #[inline(always)]
     pub fn set_low(&mut self) {
         // NOTE(unsafe) atomic write to a stateless register
-        unsafe {
-            (*Gpio::<P>::ptr())
-                .bsrr()
-                .write(|w| w.bits(1 << (self.pin_number + 16)))
-        }
+        let gpio = unsafe { &(*gpiox::<P>()) };
+        gpio.bsrr().write(|w| w.br(self.pin_number).set_bit());
     }
 
     #[inline(always)]
@@ -80,7 +74,8 @@ impl<const P: char, MODE> PartiallyErasedPin<P, Output<MODE>> {
     #[inline(always)]
     pub fn is_set_low(&self) -> bool {
         // NOTE(unsafe) atomic read with no side effects
-        unsafe { (*Gpio::<P>::ptr()).odr().read().bits() & (1 << self.pin_number) == 0 }
+        let gpio = unsafe { &(*gpiox::<P>()) };
+        gpio.odr().read().odr(self.pin_number).bit_is_clear()
     }
 
     #[inline(always)]
@@ -102,7 +97,8 @@ impl<const P: char> PartiallyErasedPin<P, Output<OpenDrain>> {
     #[inline(always)]
     pub fn is_low(&self) -> bool {
         // NOTE(unsafe) atomic read with no side effects
-        unsafe { (*Gpio::<P>::ptr()).idr().read().bits() & (1 << self.pin_number) == 0 }
+        let gpio = unsafe { &(*gpiox::<P>()) };
+        gpio.idr().read().idr(self.pin_number).bit_is_clear()
     }
 }
 
@@ -115,6 +111,7 @@ impl<const P: char, MODE> PartiallyErasedPin<P, Input<MODE>> {
     #[inline(always)]
     pub fn is_low(&self) -> bool {
         // NOTE(unsafe) atomic read with no side effects
-        unsafe { (*Gpio::<P>::ptr()).idr().read().bits() & (1 << self.pin_number) == 0 }
+        let gpio = unsafe { &(*gpiox::<P>()) };
+        gpio.idr().read().idr(self.pin_number).bit_is_clear()
     }
 }
diff --git a/src/serial.rs b/src/serial.rs
index fa2ac1a2..0c840c46 100644
--- a/src/serial.rs
+++ b/src/serial.rs
@@ -179,21 +179,21 @@ macro_rules! remap {
 use remap;
 
 pub trait SerialExt: Sized + Instance {
-    fn serial<Otype, PULL>(
+    fn serial(
         self,
-        pins: impl Into<Self::Pins<Otype, PULL>>,
+        pins: impl Into<Self::Pins<PushPull, Floating>>,
         config: impl Into<Config>,
         clocks: &Clocks,
-    ) -> Serial<Self, Otype, PULL>;
+    ) -> Serial<Self, PushPull, Floating>;
 }
 
 impl<USART: Instance> SerialExt for USART {
-    fn serial<Otype, PULL>(
+    fn serial(
         self,
-        pins: impl Into<Self::Pins<Otype, PULL>>,
+        pins: impl Into<Self::Pins<PushPull, Floating>>,
         config: impl Into<Config>,
         clocks: &Clocks,
-    ) -> Serial<Self, Otype, PULL> {
+    ) -> Serial<Self> {
         Serial::new(self, pins, config, clocks)
     }
 }
diff --git a/src/spi.rs b/src/spi.rs
index 8311d9e8..93c50419 100644
--- a/src/spi.rs
+++ b/src/spi.rs
@@ -292,51 +292,51 @@ macro_rules! remap {
 use remap;
 
 pub trait SpiExt: Sized + Instance {
-    fn spi<PULL>(
+    fn spi(
         self,
-        pins: impl Into<Self::MasterPins<PULL>>,
+        pins: impl Into<Self::MasterPins<Floating>>,
         mode: Mode,
         freq: Hertz,
         clocks: &Clocks,
-    ) -> Spi<Self, u8, PULL>;
-    fn spi_u16<PULL>(
+    ) -> Spi<Self, u8, Floating>;
+    fn spi_u16(
         self,
-        pins: impl Into<Self::MasterPins<PULL>>,
+        pins: impl Into<Self::MasterPins<Floating>>,
         mode: Mode,
         freq: Hertz,
         clocks: &Clocks,
-    ) -> Spi<Self, u16, PULL> {
+    ) -> Spi<Self, u16> {
         Self::spi(self, pins, mode, freq, clocks).frame_size_16bit()
     }
-    fn spi_slave<Otype, PULL>(
+    fn spi_slave(
         self,
-        pins: impl Into<Self::SlavePins<Otype, PULL>>,
+        pins: impl Into<Self::SlavePins<PushPull, Floating>>,
         mode: Mode,
-    ) -> SpiSlave<Self, u8, Otype, PULL>;
-    fn spi_slave_u16<Otype, PULL>(
+    ) -> SpiSlave<Self, u8, PushPull, Floating>;
+    fn spi_slave_u16(
         self,
-        pins: impl Into<Self::SlavePins<Otype, PULL>>,
+        pins: impl Into<Self::SlavePins<PushPull, Floating>>,
         mode: Mode,
-    ) -> SpiSlave<Self, u16, Otype, PULL> {
+    ) -> SpiSlave<Self, u16, PushPull, Floating> {
         Self::spi_slave(self, pins, mode).frame_size_16bit()
     }
 }
 
 impl<SPI: Instance> SpiExt for SPI {
-    fn spi<PULL>(
+    fn spi(
         self,
-        pins: impl Into<Self::MasterPins<PULL>>,
+        pins: impl Into<Self::MasterPins<Floating>>,
         mode: Mode,
         freq: Hertz,
         clocks: &Clocks,
-    ) -> Spi<Self, u8, PULL> {
+    ) -> Spi<Self, u8, Floating> {
         Spi::new(self, pins, mode, freq, clocks)
     }
-    fn spi_slave<Otype, PULL>(
+    fn spi_slave(
         self,
-        pins: impl Into<Self::SlavePins<Otype, PULL>>,
+        pins: impl Into<Self::SlavePins<PushPull, Floating>>,
         mode: Mode,
-    ) -> SpiSlave<Self, u8, Otype, PULL> {
+    ) -> SpiSlave<Self, u8, PushPull, Floating> {
         SpiSlave::new(self, pins, mode)
     }
 }