Merge pull request #295 from Sh3Rm4n/fix/v0.8.1

Fix/v0.8.1

Author: Sh3Rm4n

CHANGELOG.md

@@ -14,7 +14,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## Unreleased
 
-No changes.
+### Fixed
+
+- ADC Channel SMP Register mismatch. ([#291])
+  - While `read()`ing a Pin mapped to channel `10` and unexpected panic happened.
 
 ## [v0.8.0] - 2021-08-16
 
@@ -476,6 +479,7 @@ let clocks = rcc
 [defmt]: https://github.com/knurling-rs/defmt
 [filter]: https://defmt.ferrous-systems.com/filtering.html
 
+[#291]: https://github.com/stm32-rs/stm32f3xx-hal/pull/291
 [#278]: https://github.com/stm32-rs/stm32f3xx-hal/pull/278
 [#277]: https://github.com/stm32-rs/stm32f3xx-hal/pull/277
 [#273]: https://github.com/stm32-rs/stm32f3xx-hal/pull/273

Cargo.toml

@@ -59,8 +59,8 @@ panic-probe = "0.2.0"
 panic-semihosting = "0.5.6"
 usbd-serial = "0.1.1"
 usb-device = "0.2.8"
-cortex-m-rtic = "=0.6.0-alpha.5"
-dwt-systick-monotonic = "=0.1.0-alpha.3"
+cortex-m-rtic = "=0.6.0-rc.2"
+dwt-systick-monotonic = "=0.1.0-rc.1"
 panic-rtt-target = { version = "0.1", features = ["cortex-m"] }
 rtt-target = { version = "0.3.0", features = ["cortex-m"] }
 

src/adc.rs

@@ -498,7 +498,8 @@ macro_rules! adc_hal {
                         7 => self.adc.smpr1.modify(|_, w| w.smp7().variant(smp.into())),
                         8 => self.adc.smpr1.modify(|_, w| w.smp8().variant(smp.into())),
                         9 => self.adc.smpr1.modify(|_, w| w.smp9().variant(smp.into())),
-                        11 => self.adc.smpr2.modify(|_, w| w.smp10().variant(smp.into())),
+                        10 => self.adc.smpr2.modify(|_, w| w.smp10().variant(smp.into())),
+                        11 => self.adc.smpr2.modify(|_, w| w.smp11().variant(smp.into())),
                         12 => self.adc.smpr2.modify(|_, w| w.smp12().variant(smp.into())),
                         13 => self.adc.smpr2.modify(|_, w| w.smp13().variant(smp.into())),
                         14 => self.adc.smpr2.modify(|_, w| w.smp14().variant(smp.into())),

src/dma.rs

@@ -514,7 +514,7 @@ macro_rules! dma {
 
                             // NOTE(unsafe) atomic write to a stateless register
                             unsafe {
-                                &(*$DMAx::ptr()).ifcr.write(|w| match event {
+                                (*$DMAx::ptr()).ifcr.write(|w| match event {
                                     HalfTransfer => w.$chtifi().set_bit(),
                                     TransferComplete => w.$ctcifi().set_bit(),
                                     TransferError => w.$cteifi().set_bit(),

src/lib.rs

@@ -132,7 +132,7 @@ mod private {
                 let mask = !(u32::MAX >> (32 - $bitwidth) << ($bitwidth * $index));
                 let value = $value << ($bitwidth * $index);
                 w.bits(r.bits() & mask | value)
-            });
+            })
         };
     }
     pub(crate) use modify_at;

testsuite/tests/adc.rs

@@ -72,11 +72,11 @@ mod tests {
             defmt::debug!("{}", adc_level);
             defmt::unwrap!(state.output.set_low());
             // Vref is 3V so output should reach the maximum.
-            assert!(adc_level >= 3900 && adc_level <= 4100);
+            assert!(adc_level >= 3500 && adc_level <= 4100);
             let adc_level: u16 = defmt::unwrap!(adc.read(&mut state.analog).ok());
             defmt::debug!("{}", adc_level);
             // nearly zero (always zero can not be guaranteed)
-            assert!(adc_level <= 100);
+            assert!(adc_level <= 300);
         }
 
         // put adc back in place