Introduce fallback if no clock is set for adc

Author: Sh3Rm4n

examples/adc.rs

@@ -25,6 +25,7 @@ fn main() -> ! {
         // The following is only needed to make sure the clock signal for the ADC is set up
         // correctly.
         clocks,
+        &mut dp.ADC1_2,
         &mut rcc.ahb,
     );
 

src/adc.rs

@@ -286,7 +286,7 @@ where
         // and thus is maye a candidate for a more general RccClocksManangement thingy.
         // frequency: impl Into<Generic<u32>>,
         clocks: Clocks,
-        // adc_shared : &mut <ADC as Instance>::SharedInstance,
+        common_adc: &mut <ADC as Instance>::SharedInstance,
         ahb: &mut AHB,
     ) -> Self {
         let mut adc = Self {
@@ -299,8 +299,8 @@ where
         //     crate::panic!("Clock settings not well defined");
         // }
 
-
-        ADC::enable_clock(ahb);
+        ADC::enable_clock(&clocks, ahb, common_adc);
+        ADC::clock(&clocks);
         // if !(ADC::enable_clock(ahb)){
         //     crate::panic!("Clock already enabled with a different setting");
         // }
@@ -417,10 +417,8 @@ where
     }
 
     fn wait_adc_clk_cycles(&self, cycles: u32, clocks: Clocks) {
-        let frequency = ADC::clock(&clocks);
+        let frequency = ADC::clock(&clocks).unwrap_or(clocks.sysclk());
         let cpu_cycles = cycles * clocks.sysclk().0 / frequency.0;
-        defmt::info!("{}", cpu_cycles);
-
         asm::delay(cpu_cycles);
     }
 
@@ -521,9 +519,9 @@ pub trait Instance: Deref<Target = adc1::RegisterBlock> + crate::private::Sealed
     /// Shared Instance / Registerblock between multiple ADCs
     type SharedInstance;
     #[doc(hidden)]
-    fn enable_clock(ahb: &mut AHB);
+    fn enable_clock(clocks: &Clocks, ahb: &mut AHB, common_adc: &mut Self::SharedInstance);
     #[doc(hidden)]
-    fn clock(clocks: &Clocks) -> Hertz;
+    fn clock(clocks: &Clocks) -> Option<Hertz>;
 }
 
 // Macro to implement ADC functionallity for ADC1 and ADC2
@@ -541,17 +539,24 @@ macro_rules! adc {
             impl crate::private::Sealed for $ADC {}
             impl Instance for $ADC {
                 type SharedInstance = $ADCX_Y;
-                fn enable_clock(ahb: &mut AHB) {
+                fn enable_clock(clocks: &Clocks, ahb: &mut AHB, common_adc: &mut Self::SharedInstance) {
                     ahb.enr().modify(|_, w| w.$adcXYen().enabled());
+
+                    // No clock can be set, so we have to fallback to a default.
+                    if Self::clock(clocks).is_none() {
+                        common_adc.ccr.modify(|_, w| w
+                            .ckmode().variant(CKMODE_A::SYNCDIV1)
+                        );
+                    };
                 }
 
-                fn clock(clocks: &Clocks) -> Hertz {
+                fn clock(clocks: &Clocks) -> Option<Hertz> {
                     use crate::pac::rcc::cfgr2::$ADCXYPRES_A;
                     // SAFETY: atomic read with no side effects
                     let cfgr2 = unsafe { &(*RCC::ptr()).cfgr2 };
                     let common_adc = unsafe { &(*Self::SharedInstance::ptr()) };
 
-                    match clocks.pllclk() {
+                    Some(match clocks.pllclk() {
                         Some(pllclk) if !cfgr2.read().$adcXYpres().is_no_clock() => {
                             pllclk
                                 / match cfgr2.read().$adcXYpres().variant() {
@@ -576,10 +581,13 @@ macro_rules! adc {
                                     CKMODE_A::SYNCDIV1 => 1,
                                     CKMODE_A::SYNCDIV2 => 2,
                                     CKMODE_A::SYNCDIV4 => 4,
-                                    CKMODE_A::ASYNCHRONOUS => crate::panic!("No ADC clock"),
+                                    // Asynchronous should be enabled if PLL is on.
+                                    // If this line of code is reached PLL is off.
+                                    // Indicate that, so fallbacks can be set.
+                                    CKMODE_A::ASYNCHRONOUS => return None,
                                 }
                         }
-                    }
+                    })
                 }
             }
         )+

testsuite/tests/adc.rs

@@ -50,6 +50,7 @@ mod tests {
             adc: Some(adc::Adc::new(
                 dp.ADC1,
                 clocks,
+                &mut dp.ADC1_2,
                 &mut rcc.ahb,
             )),
             analog: pair.0,
@@ -90,6 +91,7 @@ mod tests {
         let new_adc = adc::Adc::new(
             adc1,
             state.clocks,
+            &mut state.adc1_2,
             &mut state.ahb,
         );