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Sh3Rm4nSh3Rm4n
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Merge pull request #168 from Sh3Rm4n/chore
Chore
2 parents 1359ca0 + 027239c commit 403ab19

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13 files changed

+72
-99
lines changed

13 files changed

+72
-99
lines changed

‎.cargo/config renamed to ‎.cargo/config.toml

File renamed without changes.

‎.github/workflows/ci.yml

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Original file line numberDiff line numberDiff line change
@@ -83,3 +83,16 @@ jobs:
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with:
8484
command: fmt
8585
args: --all -- --check
86+
87+
codegen:
88+
name: Check Codegen
89+
runs-on: ubuntu-latest
90+
steps:
91+
- uses: actions/checkout@v2
92+
- uses: actions-rs/toolchain@v1
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with:
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toolchain: stable
95+
override: true
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profile: minimal
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components: rustfmt
98+
- run: cd codegen && cargo check

‎Cargo.toml

Lines changed: 9 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,10 @@
11
[package]
22
edition = "2018"
3-
authors = ["Jorge Aparicio <[email protected]>", "Dylan Frankland <[email protected]>"]
3+
authors = [
4+
"Dylan Frankland <[email protected]>",
5+
"Sh3Rm4n <[email protected]>",
6+
"Jan Teske <[email protected]>"
7+
]
48
categories = ["embedded", "hardware-support", "no-std"]
59
description = "Peripheral access API for STM32F3 series microcontrollers"
610
keywords = ["arm", "cortex-m", "stm32f3xx", "hal"]
@@ -10,13 +14,16 @@ readme = "README.md"
1014
repository = "https://github.com/stm32-rs/stm32f3xx-hal"
1115
documentation = "https://docs.rs/stm32f3xx-hal"
1216
version = "0.5.0"
17+
exclude = [
18+
"codegen",
19+
]
1320

1421
[package.metadata.docs.rs]
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features = ["stm32f303xc", "rt", "stm32-usbd"]
1623
targets = ["thumbv7em-none-eabihf"]
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1825
[dependencies]
19-
cfg-if = "0.1"
26+
cfg-if = "1.0"
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cortex-m = "0.6"
2128
cortex-m-rt = "0.6"
2229
embedded-dma = "0.1"
@@ -38,10 +45,6 @@ optional = true
3845
version = "0.2"
3946
features = ["const-fn"]
4047

41-
[dependencies.cast]
42-
version = "0.2"
43-
default-features = false
44-
4548
[dependencies.stm32-usbd]
4649
version = "0.5"
4750
optional = true

‎examples/can.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,9 +6,9 @@ use panic_semihosting as _;
66

77
use stm32f3xx_hal as hal;
88

9+
use cortex_m::asm;
910
use cortex_m_rt::entry;
1011

11-
use cortex_m::asm;
1212
use hal::prelude::*;
1313
use hal::stm32;
1414
use hal::watchdog::IndependentWatchDog;

‎examples/pwm.rs

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@ use panic_semihosting as _;
77

88
use stm32f3xx_hal as hal;
99

10+
use cortex_m::asm;
1011
use cortex_m_rt::entry;
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1213
//use cortex_m_semihosting::hprintln;
@@ -148,5 +149,7 @@ fn main() -> ! {
148149
// DOES NOT COMPILE
149150
// tim8_ch1.output_to_pc6(gpioc.pc6.into_af4(&mut gpioc.moder, &mut gpioc.afrl));
150151

151-
loop {}
152+
loop {
153+
asm::wfi();
154+
}
152155
}

‎examples/serial_dma.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@
77

88
use panic_semihosting as _;
99

10-
use cortex_m::singleton;
10+
use cortex_m::{asm, singleton};
1111
use cortex_m_rt::entry;
1212
use stm32f3xx_hal::{pac, prelude::*, serial::Serial};
1313

@@ -63,6 +63,6 @@ fn main() -> ! {
6363
assert_eq!(tx_buf, rx_buf);
6464

6565
loop {
66-
continue;
66+
asm::wfi();
6767
}
6868
}

‎examples/spi.rs

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Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@ use panic_semihosting as _;
77

88
use stm32f3xx_hal as hal;
99

10+
use cortex_m::asm;
1011
use cortex_m_rt::entry;
1112

1213
use hal::pac;
@@ -61,5 +62,7 @@ fn main() -> ! {
6162
// This succeeds, when master and slave of the SPI are connected.
6263
assert_eq!(msg_send, msg_received);
6364

64-
loop {}
65+
loop {
66+
asm::wfi();
67+
}
6568
}

‎src/delay.rs

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
//! Delays
22
3-
use cast::u32;
3+
use core::convert::From;
4+
45
use cortex_m::peripheral::syst::SystClkSource;
56
use cortex_m::peripheral::SYST;
67

@@ -35,13 +36,13 @@ impl DelayMs<u32> for Delay {
3536

3637
impl DelayMs<u16> for Delay {
3738
fn delay_ms(&mut self, ms: u16) {
38-
self.delay_ms(u32(ms));
39+
self.delay_ms(u32::from(ms));
3940
}
4041
}
4142

4243
impl DelayMs<u8> for Delay {
4344
fn delay_ms(&mut self, ms: u8) {
44-
self.delay_ms(u32(ms));
45+
self.delay_ms(u32::from(ms));
4546
}
4647
}
4748

@@ -63,12 +64,12 @@ impl DelayUs<u32> for Delay {
6364

6465
impl DelayUs<u16> for Delay {
6566
fn delay_us(&mut self, us: u16) {
66-
self.delay_us(u32(us))
67+
self.delay_us(u32::from(us))
6768
}
6869
}
6970

7071
impl DelayUs<u8> for Delay {
7172
fn delay_us(&mut self, us: u8) {
72-
self.delay_us(u32(us))
73+
self.delay_us(u32::from(us))
7374
}
7475
}

‎src/dma.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -12,8 +12,8 @@ use crate::{
1212
rcc::AHB,
1313
serial,
1414
};
15-
use cast::u16;
1615
use core::{
16+
convert::TryFrom,
1717
mem,
1818
sync::atomic::{self, Ordering},
1919
};
@@ -57,7 +57,7 @@ impl<B, C: Channel, T: Target> Transfer<B, C, T> {
5757
// method we can call is `write_buffer`, which is allowed by
5858
// `WriteBuffer`'s safety requirements.
5959
let (ptr, len) = unsafe { buffer.write_buffer() };
60-
let len = u16(len).expect("buffer is too large");
60+
let len = u16::try_from(len).expect("buffer is too large");
6161

6262
// NOTE(unsafe) We are using the address of a 'static WriteBuffer here,
6363
// which is guaranteed to be safe for DMA.
@@ -84,7 +84,7 @@ impl<B, C: Channel, T: Target> Transfer<B, C, T> {
8484
// `&mut self` methods we can call, so we are safe according to
8585
// `ReadBuffer`'s safety requirements.
8686
let (ptr, len) = unsafe { buffer.read_buffer() };
87-
let len = u16(len).expect("buffer is too large");
87+
let len = u16::try_from(len).expect("buffer is too large");
8888

8989
// NOTE(unsafe) We are using the address of a 'static ReadBuffer here,
9090
// which is guaranteed to be safe for DMA.

‎src/i2c.rs

Lines changed: 9 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1,13 +1,14 @@
11
//! Inter-Integrated Circuit (I2C) bus
22
3+
use core::convert::TryFrom;
4+
35
use crate::{
46
gpio::{gpioa, gpiob, gpiof, AF4},
57
hal::blocking::i2c::{Read, Write, WriteRead},
68
pac::{I2C1, I2C2},
79
rcc::{Clocks, APB1},
810
time::Hertz,
911
};
10-
use cast::u8;
1112

1213
/// I2C error
1314
#[derive(Debug)]
@@ -152,28 +153,25 @@ macro_rules! hal {
152153
(presc, scll, sclh, sdadel, scldel)
153154
};
154155

155-
let presc = u8(presc).unwrap();
156156
assert!(presc < 16);
157-
let scldel = u8(scldel).unwrap();
158157
assert!(scldel < 16);
159-
let sdadel = u8(sdadel).unwrap();
160158
assert!(sdadel < 16);
161-
let sclh = u8(sclh).unwrap();
162-
let scll = u8(scll).unwrap();
159+
let sclh = u8::try_from(sclh).unwrap();
160+
let scll = u8::try_from(scll).unwrap();
163161

164162
// Configure for "fast mode" (400 KHz)
165163
// NOTE(write): writes all non-reserved bits.
166164
i2c.timingr.write(|w| {
167165
w.presc()
168-
.bits(presc)
166+
.bits(presc as u8)
167+
.sdadel()
168+
.bits(sdadel as u8)
169+
.scldel()
170+
.bits(scldel as u8)
169171
.scll()
170172
.bits(scll)
171173
.sclh()
172174
.bits(sclh)
173-
.sdadel()
174-
.bits(sdadel)
175-
.scldel()
176-
.bits(scldel)
177175
});
178176

179177
// Enable the peripheral

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