Merge pull request #265 from Sh3Rm4n/format

Extend Format and Debug support

Author: Sh3Rm4n

CHANGELOG.md

@@ -47,6 +47,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
   register without throwing any event. ([#253]).
 - Lift generic constraint of most `Serial` method on `TxPin` and `RxPin`.
   This should make it easier to generically use the `Serial` peripheral. ([#253])
+- Greatly increase coverage of `Debug` and `defmt::Format` implementations.
+  Almost all important types should now be supported. ([#265])
 
 [`enumset`]: https://crates.io/crates/enumset
 
@@ -426,6 +428,7 @@ let clocks = rcc
 [defmt]: https://github.com/knurling-rs/defmt
 [filter]: https://defmt.ferrous-systems.com/filtering.html
 
+[#265]: https://github.com/stm32-rs/stm32f3xx-hal/pull/265
 [#264]: https://github.com/stm32-rs/stm32f3xx-hal/pull/264
 [#263]: https://github.com/stm32-rs/stm32f3xx-hal/pull/263
 [#262]: https://github.com/stm32-rs/stm32f3xx-hal/pull/262

src/adc.rs

@@ -45,6 +45,8 @@ pub struct Adc<ADC> {
 /// There is always an overhead of 13 ADC clock cycles.
 /// E.g. For Sampletime T_19 the total conversion time (in ADC clock cycles) is
 /// 13 + 19 = 32 ADC Clock Cycles
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum SampleTime {
     /// 1.5 ADC clock cycles
     T_1,
@@ -87,9 +89,10 @@ impl SampleTime {
     }
 }
 
-#[derive(Clone, Copy, PartialEq)]
 /// ADC operation mode
 // TODO: Implement other modes (DMA, Differential,…)
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum OperationMode {
     /// OneShot Mode
     OneShot,
@@ -128,6 +131,8 @@ impl From<CkMode> for CKMODE_A {
 }
 
 /// ADC data register alignment
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum Align {
     /// Right alignment of output data
     Right,

src/delay.rs

@@ -6,6 +6,7 @@
 //! [DelayUs]: embedded_hal::blocking::delay::DelayUs
 
 use core::convert::From;
+use core::fmt;
 
 use cortex_m::peripheral::syst::SystClkSource;
 use cortex_m::peripheral::SYST;
@@ -21,6 +22,22 @@ pub struct Delay {
     syst: SYST,
 }
 
+#[cfg(feature = "defmt")]
+impl defmt::Format for Delay {
+    fn format(&self, f: defmt::Formatter) {
+        defmt::write!(f, "Delay {{ clocks: {} , syst: SYST }}", self.clocks);
+    }
+}
+
+impl fmt::Debug for Delay {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        f.debug_struct("Delay")
+            .field("clocks", &self.clocks)
+            .field("syst", &"SYST")
+            .finish()
+    }
+}
+
 impl Delay {
     /// Configures the system timer (SysTick) as a delay provider
     ///

src/gpio.rs

@@ -177,11 +177,19 @@ pub mod marker {
 }
 
 /// Runtime defined GPIO port (type state)
+#[derive(Debug)]
 pub struct Gpiox {
     ptr: *const dyn GpioRegExt,
     index: u8,
 }
 
+#[cfg(feature = "defmt")]
+impl defmt::Format for Gpiox {
+    fn format(&self, f: defmt::Formatter) {
+        defmt::write!(f, "Gpiox {{ ptr: GpioRegExt , index: {:?} }}", self.index);
+    }
+}
+
 // # SAFETY
 // As Gpiox uses `dyn GpioRegExt` pointer internally, `Send` is not auto-implemented.
 // But since GpioExt does only do atomic operations without side-effects we can assume
@@ -212,6 +220,8 @@ impl marker::Gpio for Gpiox {}
 // TODO(Sh3Rm4n): If the pin number wouldn't be runtime defined, the implementation for all
 // statically defined pins would be much easier (and withless overhead). What could be the
 // solution?
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct Ux(u8);
 
 impl marker::Index for Ux {
@@ -221,6 +231,8 @@ impl marker::Index for Ux {
 }
 
 /// Compile time defined pin number (type state)
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct U<const X: u8>;
 
 impl<const X: u8> marker::Index for U<X> {
@@ -231,17 +243,29 @@ impl<const X: u8> marker::Index for U<X> {
 }
 
 /// Input mode (type state)
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct Input;
 /// Output mode (type state)
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct Output<Otype>(PhantomData<Otype>);
 /// Alternate function (type state)
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct Alternate<Otype, const AF: u8>(PhantomData<Otype>);
 /// Analog mode (type state)
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct Analog;
 
 /// Push-pull output (type state)
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct PushPull;
 /// Open-drain output (type state)
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct OpenDrain;
 
 impl marker::Readable for Input {}
@@ -277,7 +301,7 @@ pub enum Resistor {
 }
 
 /// GPIO interrupt trigger edge selection
-#[derive(Copy, Clone, PartialEq, Eq)]
+#[derive(Debug, Copy, Clone, PartialEq, Eq)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum Edge {
     /// Rising edge of voltage
@@ -289,6 +313,8 @@ pub enum Edge {
 }
 
 /// Generic pin
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct Pin<Gpio, Index, Mode> {
     pub(crate) gpio: Gpio,
     pub(crate) index: Index,
@@ -769,6 +795,8 @@ macro_rules! gpio {
     }) => {
         paste::paste! {
             #[doc = "GPIO port " $GPIOX " (type state)"]
+            #[derive(Debug)]
+            #[cfg_attr(feature = "defmt", derive(defmt::Format))]
             pub struct $Gpiox;
 
             impl private::Gpio for $Gpiox {

src/pwm.rs

@@ -208,37 +208,61 @@ use crate::gpio::gpioe;
 use crate::gpio::{gpioc, gpiof};
 
 /// Output Compare Channel 1 of Timer 1 (type state)
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct TIM2_CH1 {}
 /// Output Compare Channel 2 of Timer 1 (type state)
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct TIM2_CH2 {}
 /// Output Compare Channel 3 of Timer 1 (type state)
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct TIM2_CH3 {}
 /// Output Compare Channel 4 of Timer 1 (type state)
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct TIM2_CH4 {}
 
 /// Output Compare Channel 1 of Timer 15 (type state)
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct TIM15_CH1 {}
 /// Output Compare Channel 2 of Timer 15 (type state)
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct TIM15_CH2 {}
 
 /// Output Compare Channel 1 of Timer 16 (type state)
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct TIM16_CH1 {}
 
 /// Output Compare Channel 1 of Timer 17 (type state)
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct TIM17_CH1 {}
 
 /// Type state used to represent a channel that has no pins yet
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct NoPins {}
 /// Type state used to represent a channel is using regular pins
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct WithPins {}
 /// Type state used to represent a channel is using (only) complementary pins
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct WithNPins {}
 
 /// Representation of a Channel for an abritary timer channel,
 /// that also holds a type state for whether or not this channel
 /// is using any pins yet.
 ///
 /// If there are no pins supplied, it cannot be enabled.
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct PwmChannel<X, T> {
     timx_chy: PhantomData<X>,
     pin_status: PhantomData<T>,

src/rcc.rs

@@ -778,7 +778,8 @@ impl CFGR {
 ///
 /// The existence of this value indicates that the clock configuration can no longer be changed.
 /// This struct can be obtained via the [freeze](CFGR::freeze) method of the [CFGR](CFGR) struct.
-#[derive(Clone, Copy)]
+#[derive(Debug, Clone, Copy)]
+// #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct Clocks {
     hclk: Hertz,
     pclk1: Hertz,
@@ -789,6 +790,25 @@ pub struct Clocks {
     usbclk_valid: bool,
 }
 
+// TODO(Sh3Rm4n) Add defmt support for embedded-time!
+#[cfg(feature = "defmt")]
+impl defmt::Format for Clocks {
+    fn format(&self, f: defmt::Formatter) {
+        // Format as hexadecimal.
+        defmt::write!(
+            f,
+            "Clocks {{ hclk: {} Hz, pclk1: {} Hz, pclk2: {} Hz, ppre1: {:b}, ppre2: {:b}, sysclk: {} Hz, usbclk_valid: {} }}",
+            self.hclk.integer(),
+            self.pclk1.integer(),
+            self.pclk2.integer(),
+            self.ppre1,
+            self.ppre2,
+            self.sysclk.integer(),
+            self.usbclk_valid,
+        );
+    }
+}
+
 impl Clocks {
     /// Returns the frequency of the AHB
     pub fn hclk(&self) -> Hertz {

src/rtc.rs

@@ -8,10 +8,12 @@
 use crate::pac::{PWR, RTC};
 use crate::rcc::{APB1, BDCR};
 use core::convert::TryInto;
+use core::fmt;
 use rtcc::{Datelike, Hours, NaiveDate, NaiveDateTime, NaiveTime, Rtcc, Timelike};
 
 /// RTC error type
-#[derive(Debug)]
+#[derive(Copy, Clone, PartialEq, Eq, Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum Error {
     /// Invalid input error
     InvalidInputData,
@@ -23,6 +25,19 @@ pub struct Rtc {
     pub regs: RTC,
 }
 
+#[cfg(feature = "defmt")]
+impl defmt::Format for Rtc {
+    fn format(&self, f: defmt::Formatter) {
+        defmt::write!(f, "Rtc {{ rtc: RTC }}");
+    }
+}
+
+impl fmt::Debug for Rtc {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        f.debug_struct("Rtc").field("rtc", &"RTC").finish()
+    }
+}
+
 impl Rtc {
     /// Create and enable a new RTC, and configure its clock source and prescalers.
     /// From AN4759, Table 7, when using the LSE (The only clock source this module