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Merge pull request #80 from jkboyce/pwm_fix
Fixes to prevent panic setting up TIM2 in pwm example
2 parents ca8a86c + 4417007 commit 5f15e0f

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examples/pwm.rs

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@ fn main() -> ! {
2323
// Configure our clocks
2424
let mut flash = dp.FLASH.constrain();
2525
let mut rcc = dp.RCC.constrain();
26-
let clocks = rcc.cfgr.freeze(&mut flash.acr);
26+
let clocks = rcc.cfgr.sysclk(16.mhz()).freeze(&mut flash.acr);
2727

2828
// Prep the pins we need in their correct alternate function
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let mut gpioa = dp.GPIOA.split(&mut rcc.ahb);
@@ -34,10 +34,8 @@ fn main() -> ! {
3434
let mut gpiob = dp.GPIOB.split(&mut rcc.ahb);
3535
let pb0 = gpiob.pb0.into_af2(&mut gpiob.moder, &mut gpiob.afrl);
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let pb1 = gpiob.pb1.into_af2(&mut gpiob.moder, &mut gpiob.afrl);
37-
let pb3 = gpiob.pb3.into_af4(&mut gpiob.moder, &mut gpiob.afrl);
3837
let pb4 = gpiob.pb4.into_af2(&mut gpiob.moder, &mut gpiob.afrl);
3938
let pb5 = gpiob.pb5.into_af2(&mut gpiob.moder, &mut gpiob.afrl);
40-
let pb7 = gpiob.pb7.into_af10(&mut gpiob.moder, &mut gpiob.afrl);
4139
let pb8 = gpiob.pb8.into_af1(&mut gpiob.moder, &mut gpiob.afrh);
4240
let pb10 = gpiob.pb10.into_af1(&mut gpiob.moder, &mut gpiob.afrh);
4341

@@ -77,7 +75,7 @@ fn main() -> ! {
7775
tim3_ch3.set_duty(tim3_ch3.get_max_duty() / 50 * 3); // 6% duty cyle
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tim3_ch3.enable();
7977

80-
let mut tim3_ch4 = tim3_channels.3.output_to_pb1(pb1).output_to_pb7(pb7);
78+
let mut tim3_ch4 = tim3_channels.3.output_to_pb1(pb1);
8179
tim3_ch4.set_duty(tim3_ch4.get_max_duty() / 10); // 10% duty cyle
8280
tim3_ch4.enable();
8381

@@ -132,7 +130,7 @@ fn main() -> ! {
132130
&clocks, // To get the timer's clock speed
133131
);
134132

135-
let mut tim8_ch1 = tim8_channels.0.output_to_pb3(pb3).output_to_pc10(pc10);
133+
let mut tim8_ch1 = tim8_channels.0.output_to_pc10(pc10);
136134
tim8_ch1.set_duty(tim8_ch1.get_max_duty() / 10); // 10% duty cyle
137135
tim8_ch1.enable();
138136

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