Merge pull request #220 from Sh3Rm4n/memory_x

Improve build.rs and some more.

Author: Sh3Rm4n

.github/workflows/ci.yml

@@ -64,7 +64,7 @@ jobs:
       - uses: actions/checkout@v2
       - uses: actions-rs/toolchain@v1
         with:
-          toolchain: 1.48.0
+          toolchain: 1.50.0
           target: thumbv7em-none-eabihf
           override: true
           profile: minimal

CHANGELOG.md

@@ -31,6 +31,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ### Breaking Changes
 
+- The MSVR was bumped to 1.50 ([#220])
 - Replace custom time based units with types defined in the [embedded-time][]
   crate ([#192])
 - The `rcc` public API now expects time based units in `Megahertz`.
@@ -62,6 +63,9 @@ let clocks = rcc
   in alternate function mode ([#189])
 - GPIO internal resistor configuration is no longer encoded into pin typestate
   in input mode ([#189])
+- Remove `stm32` module. Use `use stm32f3xx_hal::pac` instead.
+  This module was a deprecated in [v0.5.0][] and is now subject for
+  removal. ([#220])
 
 ## [v0.6.1] - 2020-12-10
 
@@ -316,6 +320,7 @@ let clocks = rcc
 [defmt]: https://github.com/knurling-rs/defmt
 [filter]: https://defmt.ferrous-systems.com/filtering.html
 
+[#220]: https://github.com/stm32-rs/stm32f3xx-hal/pull/220
 [#217]: https://github.com/stm32-rs/stm32f3xx-hal/pull/217
 [#216]: https://github.com/stm32-rs/stm32f3xx-hal/pull/216
 [#211]: https://github.com/stm32-rs/stm32f3xx-hal/pull/211

Cargo.toml

@@ -61,6 +61,10 @@ panic-probe = "0.2"
 defmt-rtt = "0.2"
 defmt-test = "0.2"
 
+[build-dependencies]
+cargo_metadata = "0.13.1"
+slice-group-by = "0.2.6"
+
 [features]
 default = ["unproven"]
 unproven = ["embedded-hal/unproven"]

README.md

@@ -154,7 +154,7 @@ See the [examples folder](examples) for more example programs.
 
 ## Minimum Supported Rust Version (MSRV)
 
-This crate is guaranteed to compile on stable Rust 1.48.0 and up. It *might*
+This crate is guaranteed to compile on stable Rust 1.50.0 and up. It *might*
 compile with older versions but that may change in any new patch release.
 
 <!-- This should not prevent anyone to use newer features. -->

build.rs

@@ -1,4 +1,14 @@
-use std::{env, fs::File, io::prelude::*, path::PathBuf};
+use std::collections::hash_set::HashSet;
+use std::env;
+use std::fs::File;
+use std::io::prelude::*;
+use std::path::PathBuf;
+
+use cargo_metadata::MetadataCommand;
+// TODO(Sh3Rm4n - 2021-04-28):
+// Remove when [feature="slice_group_by"] is stable.
+// See with https://github.com/rust-lang/rust/issues/80552.
+use slice_group_by::GroupBy;
 
 fn main() {
     check_device_feature();
@@ -10,40 +20,75 @@ fn main() {
 
 /// Check device feature selection
 fn check_device_feature() {
-    if !cfg!(feature = "device-selected") {
-        if cfg!(feature = "direct-call-deprecated") {
-            eprintln!(
-                "The feature you selected is deprecated, because it was split up into sub-devices.
+    // Check if the device is deprecated
+    if !cfg!(feature = "device-selected") && cfg!(feature = "direct-call-deprecated") {
+        eprintln!(
+            "The (device-)feature you selected is deprecated, because it was split up into sub-devices.\n\
+            \n\
+            Example: The STM32F3Discovery board has a STM32F303VCT6 chip.\n\
+            You probably used to use `stm32f303` but now functionalities for the sub-device were added.\n\
+            In this case replace it with `stm32f303xc` to make your code build again.\n\
+            \n\
+            For more information, see \
+            \x1b]8;;https://github.com/stm32-rs/stm32f3xx-hal#selecting-the-right-chip\x1b\\README \
+            -> Selecting the right chip\x1b]8;;\x1b\\."
+        );
+        std::process::exit(1);
+    }
 
-Example: The STM32F3Discovery board has a STM32F303VCT6 chip.
-You probably used to use `stm32f303` but now functionalities for the sub-device were added.
-In this case replace it with `stm32f303xc` to make your code build again.
+    // get all device variants from the metadata
+    let metadata = MetadataCommand::new().exec().unwrap();
+    let device_variants: HashSet<String> = metadata
+        .root_package()
+        .unwrap()
+        .features
+        .iter()
+        .filter_map(|(feature, dependent_features)| {
+            dependent_features
+                .iter()
+                .any(|dependent_feature| dependent_feature == "device-selected")
+                .then(|| feature.clone())
+        })
+        .collect();
 
-For more information, see \x1b]8;;https://github.com/stm32-rs/stm32f3xx-hal#selecting-the-right-chip\x1b\\README -> Selecting the right chip\x1b]8;;\x1b\\."
-            );
-        } else {
-            eprintln!(
-                "This crate requires you to specify your target chip as a feature.
+    // get all selected features via env variables
+    let selected_features: HashSet<String> = env::vars()
+        .filter_map(|(key, _)| {
+            key.split("CARGO_FEATURE_")
+                .nth(1)
+                .map(|s| s.to_owned().to_ascii_lowercase())
+        })
+        .collect();
 
-Please select one of the following (`x` denotes any character in [a-z]):
-
-    stm32f301x6 stm32f301x8
-    stm32f318x8
-    stm32f302x6 stm32f302x8 stm32f302xb stm32f302xc stm32f302xd stm32f302xe
-    stm32f303x6 stm32f303x8 stm32f303xb stm32f303xc stm32f303xd stm32f303xe
-    stm32f328x8
-    stm32f358xc
-    stm32f398xe
-    stm32f373x8 stm32f373xb stm32f373xc
-    stm32f378xc
-    stm32f334x4 stm32f334x6 stm32f334x8
+    // check if exactly one device was selected
+    if device_variants.intersection(&selected_features).count() != 1 {
+        eprintln!(
+            "This crate requires you to specify your target chip as a feature.\n\
+            \n\
+            Please select **one** of the following (`x` denotes any character in [a-z]):\n"
+        );
 
-Example: The STM32F3Discovery board has a STM32F303VCT6 chip.
-So you need to specify stm32f303xc in your Cargo.toml (note that VC → xc).
+        // group device variants by type
+        let mut device_variants: Vec<String> = device_variants.into_iter().collect();
+        device_variants.sort_unstable();
+        let device_variants = device_variants.linear_group_by(|a, b| a[..9] == b[..9]);
 
-For more information, see \x1b]8;;https://github.com/stm32-rs/stm32f3xx-hal#selecting-the-right-chip\x1b\\README -> Selecting the right chip\x1b]8;;\x1b\\."
-            );
+        // pretty print all avaliable devices
+        for line in device_variants {
+            for device in line {
+                eprint!("{} ", device);
+            }
+            eprintln!();
         }
+
+        eprintln!(
+            "\nExample: The STM32F3Discovery board has a STM32F303VCT6 chip.\n\
+            So you need to specify stm32f303xc in your Cargo.toml (note that VC → xc).\n\
+            \n\
+            For more information, see \
+            \x1b]8;;https://github.com/stm32-rs/stm32f3xx-hal#selecting-the-right-chip\x1b\\README \
+            -> Selecting the right chip\x1b]8;;\x1b\\."
+        );
         std::process::exit(1);
     }
 }

examples/can.rs

@@ -9,8 +9,8 @@ use stm32f3xx_hal as hal;
 use cortex_m::asm;
 use cortex_m_rt::entry;
 
+use hal::pac;
 use hal::prelude::*;
-use hal::stm32;
 use hal::watchdog::IndependentWatchDog;
 
 use hal::can::{Can, CanFilter, CanFrame, CanId, Filter, Frame, Receiver, Transmitter};
@@ -22,7 +22,7 @@ const ID: u16 = 0b100;
 
 #[entry]
 fn main() -> ! {
-    let dp = stm32::Peripherals::take().unwrap();
+    let dp = pac::Peripherals::take().unwrap();
 
     let mut flash = dp.FLASH.constrain();
     let mut rcc = dp.RCC.constrain();

src/adc.rs

@@ -1,8 +1,8 @@
-//! API for the ADC (Analog to Digital Converter)
+//! Analog to Digital Converter. (Requires feature `stm32f303x[bcde]`)
 //!
 //! # Examples
 //!
-//! Check out [examles/adc.rs].
+//! Check out [examles/adc.rs][].
 //!
 //! It can be built for the STM32F3Discovery running
 //! `cargo build --example adc --features=stm32f303xc`

src/can.rs

@@ -1,4 +1,4 @@
-//! Controller Area Network
+//! Controller Area Network (Requires feature `can`)
 //!
 //! CAN is currently not enabled by default, and
 //! can be enabled by the `can` feature.
@@ -15,18 +15,20 @@ pub use embedded_hal_can::{self, Filter, Frame, Id, Receiver, Transmitter};
 
 use crate::gpio::gpioa;
 use crate::gpio::{PushPull, AF9};
+use crate::pac;
 use crate::rcc::APB1;
-use crate::stm32;
 use nb::{self, Error};
 
 use core::sync::atomic::{AtomicU8, Ordering};
-pub use stm32::can::btr::LBKM_A;
+pub use pac::can::btr::LBKM_A;
 
 const EXID_MASK: u32 = 0b1_1111_1111_1100_0000_0000_0000_0000;
 const MAX_EXTENDED_ID: u32 = 0x1FFF_FFFF;
 
-/// Options the CAN bus. This is primarily used to set bus timings, but also controls options like enabling loopback or silent mode for debugging.
-/// See  http://www.bittiming.can-wiki.info/#bxCAN for generating the timing parameters for different baud rates and clocks.
+/// Options for the CAN bus.
+///
+/// This is primarily used to set bus timings, but also controls options like enabling loopback or silent mode for debugging.
+/// See  <http://www.bittiming.can-wiki.info/#bxCAN> for generating the timing parameters for different baud rates and clocks.
 ///
 /// Use `CanOpts::default()` to get 250kbps at 32mhz system clock
 pub struct CanOpts {
@@ -43,25 +45,25 @@ impl CanOpts {
         CanOpts::default()
     }
 
-    /// Set the Baud Rate Prescaler. See  http://www.bittiming.can-wiki.info/#bxCAN for generating the timing parameters for different baud rates and clocks.
+    /// Set the Baud Rate Prescaler. See  <http://www.bittiming.can-wiki.info/#bxCAN> for generating the timing parameters for different baud rates and clocks.
     pub fn brp(mut self, brp: u16) -> Self {
         self.brp = brp;
         self
     }
 
-    /// Set the Resynchronisation Jump Width. See  http://www.bittiming.can-wiki.info/#bxCAN for generating the timing parameters for different baud rates and clocks.
+    /// Set the Resynchronisation Jump Width. See  <http://www.bittiming.can-wiki.info/#bxCAN> for generating the timing parameters for different baud rates and clocks.
     pub fn sjw(mut self, sjw: u8) -> Self {
         self.sjw = sjw;
         self
     }
 
-    /// Set Time Segment One. See  http://www.bittiming.can-wiki.info/#bxCAN for generating the timing parameters for different baud rates and clocks.
+    /// Set Time Segment One. See  <http://www.bittiming.can-wiki.info/#bxCAN> for generating the timing parameters for different baud rates and clocks.
     pub fn ts1(mut self, ts1: u8) -> Self {
         self.ts1 = ts1;
         self
     }
 
-    /// Set Time Segment Two. See  http://www.bittiming.can-wiki.info/#bxCAN for generating the timing parameters for different baud rates and clocks.
+    /// Set Time Segment Two. See  <http://www.bittiming.can-wiki.info/#bxCAN> for generating the timing parameters for different baud rates and clocks.
     pub fn ts2(mut self, ts2: u8) -> Self {
         self.ts2 = ts2;
         self
@@ -147,7 +149,7 @@ static FILTER_INDEX: AtomicU8 = AtomicU8::new(0);
 
 /// Controll Area Network (CAN) Peripheral
 pub struct Can {
-    can: stm32::CAN,
+    can: pac::CAN,
     _rx: gpioa::PA11<AF9<PushPull>>,
     _tx: gpioa::PA12<AF9<PushPull>>,
 }
@@ -160,7 +162,7 @@ pub struct CanFifo {
 
 /// A CAN transmitter which is used to send messages to the CAN network.
 pub struct CanTransmitter {
-    _can: stm32::CAN,
+    _can: pac::CAN,
     _rx: gpioa::PA11<AF9<PushPull>>,
     _tx: gpioa::PA12<AF9<PushPull>>,
 }
@@ -316,7 +318,7 @@ impl CanFilterData {
 impl Can {
     /// Initialize the CAN peripheral using the options specified by `opts`.
     pub fn new_with_opts(
-        can: stm32::CAN,
+        can: pac::CAN,
         rx: gpioa::PA11<AF9<PushPull>>,
         tx: gpioa::PA12<AF9<PushPull>>,
         apb1: &mut APB1,
@@ -362,7 +364,7 @@ impl Can {
     }
     /// Initialize the CAN Peripheral using default options from `CanOpts::default()`
     pub fn new(
-        can: stm32::CAN,
+        can: pac::CAN,
         rx: gpioa::PA11<AF9<PushPull>>,
         tx: gpioa::PA12<AF9<PushPull>>,
         apb1: &mut APB1,
@@ -399,7 +401,7 @@ impl Can {
     pub fn free(
         self,
     ) -> (
-        stm32::CAN,
+        pac::CAN,
         gpioa::PA11<AF9<PushPull>>,
         gpioa::PA12<AF9<PushPull>>,
     ) {
@@ -426,7 +428,7 @@ impl embedded_hal_can::Transmitter for CanTransmitter {
         &mut self,
         frame: &Self::Frame,
     ) -> Result<Option<Self::Frame>, nb::Error<Self::Error>> {
-        let can = unsafe { &*stm32::CAN::ptr() };
+        let can = unsafe { &*pac::CAN::ptr() };
 
         for tx_idx in 0..3 {
             let free = match tx_idx {
@@ -489,7 +491,7 @@ impl embedded_hal_can::Transmitter for CanTransmitter {
 
 impl Receiver for CanFifo {
     fn receive(&mut self) -> Result<Self::Frame, Error<Self::Error>> {
-        let can = unsafe { &*stm32::CAN::ptr() };
+        let can = unsafe { &*pac::CAN::ptr() };
 
         let rx = &can.rx[self.idx];
         if can.rfr[self.idx].read().fmp().bits() > 0 {
@@ -541,7 +543,7 @@ impl Receiver for CanFifo {
     /// Sets a filter in the next open filter register.
     fn set_filter(&mut self, filter: Self::Filter) {
         cortex_m::interrupt::free(|_cs| {
-            let can = unsafe { &*stm32::CAN::ptr() };
+            let can = unsafe { &*pac::CAN::ptr() };
 
             // Filter init mode
             can.fmr.modify(|_, w| w.finit().set_bit());

src/dma.rs

@@ -1,6 +1,6 @@
-//! Direct memory access (DMA) controller
+//! Direct memory access (DMA) controller. (Requires feature `stm32f303*` or `stm32f302*`)
 //!
-//! Currently DMA is only supported for STM32F303 MCUs.
+//! Currently DMA is only supported for STM32F303 or STM32F302 MCUs.
 //!
 //! An example how to use DMA for serial, can be found at [examples/serial_dma.rs]
 //!