Skip to content

Commit 7fab5c5

Browse files
Sh3Rm4nSh3Rm4n
committed
Rename Rtc.regs -> Rtc.rtc and make it private
1 parent 94f5577 commit 7fab5c5

File tree

1 file changed

+34
-34
lines changed

1 file changed

+34
-34
lines changed

‎src/rtc.rs

Lines changed: 34 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@ pub enum Error {
2323
/// Real Time Clock peripheral
2424
pub struct Rtc {
2525
/// RTC Peripheral register definition
26-
pub regs: RTC,
26+
rtc: RTC,
2727
}
2828

2929
#[cfg(feature = "defmt")]
@@ -47,22 +47,22 @@ impl Rtc {
4747
/// The `bypass` argument is `true` if you're using an external oscillator that
4848
/// doesn't connect to `OSC32_IN`, such as a MEMS resonator.
4949
pub fn new(
50-
regs: RTC,
50+
rtc: RTC,
5151
prediv_s: u16,
5252
prediv_a: u8,
5353
bypass: bool,
5454
apb1: &mut APB1,
5555
bdcr: &mut BDCR,
5656
pwr: &mut PWR,
5757
) -> Self {
58-
let mut result = Self { regs };
58+
let mut result = Self { rtc };
5959

6060
enable_lse(bdcr, bypass);
6161
unlock(apb1, pwr);
6262
enable(bdcr);
6363
result.set_24h_fmt();
6464

65-
result.regs.prer.modify(|_, w| {
65+
result.rtc.prer.modify(|_, w| {
6666
w.prediv_s().bits(prediv_s);
6767
w.prediv_a().bits(prediv_a)
6868
});
@@ -72,22 +72,22 @@ impl Rtc {
7272

7373
/// Sets calendar clock to 24 hr format
7474
pub fn set_24h_fmt(&mut self) {
75-
self.regs.cr.modify(|_, w| w.fmt().set_bit());
75+
self.rtc.cr.modify(|_, w| w.fmt().set_bit());
7676
}
7777
/// Sets calendar clock to 12 hr format
7878
pub fn set_12h_fmt(&mut self) {
79-
self.regs.cr.modify(|_, w| w.fmt().clear_bit());
79+
self.rtc.cr.modify(|_, w| w.fmt().clear_bit());
8080
}
8181

8282
/// Reads current hour format selection
8383
pub fn is_24h_fmt(&self) -> bool {
84-
self.regs.cr.read().fmt().bit()
84+
self.rtc.cr.read().fmt().bit()
8585
}
8686

8787
/// Release the RTC peripheral
8888
pub fn free(self) -> RTC {
8989
// TODO(Sh3Rm4n): Disable peripheral before releasing it.
90-
self.regs
90+
self.rtc
9191
}
9292

9393
/// As described in Section 27.3.7 in RM0316,
@@ -98,20 +98,20 @@ impl Rtc {
9898
F: FnMut(&mut RTC),
9999
{
100100
// Disable write protection
101-
self.regs.wpr.write(|w| unsafe { w.bits(0xCA) });
102-
self.regs.wpr.write(|w| unsafe { w.bits(0x53) });
101+
self.rtc.wpr.write(|w| unsafe { w.bits(0xCA) });
102+
self.rtc.wpr.write(|w| unsafe { w.bits(0x53) });
103103
// Enter init mode
104-
let isr = self.regs.isr.read();
104+
let isr = self.rtc.isr.read();
105105
if isr.initf().bit_is_clear() {
106-
self.regs.isr.modify(|_, w| w.init().set_bit());
107-
while self.regs.isr.read().initf().bit_is_clear() {}
106+
self.rtc.isr.modify(|_, w| w.init().set_bit());
107+
while self.rtc.isr.read().initf().bit_is_clear() {}
108108
}
109109
// Invoke closure
110-
closure(&mut self.regs);
110+
closure(&mut self.rtc);
111111
// Exit init mode
112-
self.regs.isr.modify(|_, w| w.init().clear_bit());
112+
self.rtc.isr.modify(|_, w| w.init().clear_bit());
113113
// wait for last write to be done
114-
while !self.regs.isr.read().initf().bit_is_clear() {}
114+
while !self.rtc.isr.read().initf().bit_is_clear() {}
115115
}
116116
}
117117

@@ -125,7 +125,7 @@ impl Rtcc for Rtc {
125125
let (ht, hu) = bcd2_encode(time.hour())?;
126126
let (mnt, mnu) = bcd2_encode(time.minute())?;
127127
let (st, su) = bcd2_encode(time.second())?;
128-
self.regs.tr.write(|w| {
128+
self.rtc.tr.write(|w| {
129129
w.ht().bits(ht);
130130
w.hu().bits(hu);
131131
w.mnt().bits(mnt);
@@ -143,7 +143,7 @@ impl Rtcc for Rtc {
143143
return Err(Error::InvalidInputData);
144144
}
145145
let (st, su) = bcd2_encode(seconds as u32)?;
146-
self.modify(|regs| regs.tr.modify(|_, w| w.st().bits(st).su().bits(su)));
146+
self.modify(|rtc| rtc.tr.modify(|_, w| w.st().bits(st).su().bits(su)));
147147

148148
Ok(())
149149
}
@@ -153,7 +153,7 @@ impl Rtcc for Rtc {
153153
return Err(Error::InvalidInputData);
154154
}
155155
let (mnt, mnu) = bcd2_encode(minutes as u32)?;
156-
self.modify(|regs| regs.tr.modify(|_, w| w.mnt().bits(mnt).mnu().bits(mnu)));
156+
self.modify(|rtc| rtc.tr.modify(|_, w| w.mnt().bits(mnt).mnu().bits(mnu)));
157157

158158
Ok(())
159159
}
@@ -165,7 +165,7 @@ impl Rtcc for Rtc {
165165
Hours::AM(_h) | Hours::PM(_h) => self.set_12h_fmt(),
166166
}
167167

168-
self.regs.tr.modify(|_, w| w.ht().bits(ht).hu().bits(hu));
168+
self.rtc.tr.modify(|_, w| w.ht().bits(ht).hu().bits(hu));
169169

170170
Ok(())
171171
}
@@ -174,7 +174,7 @@ impl Rtcc for Rtc {
174174
if !(1..=7).contains(&weekday) {
175175
return Err(Error::InvalidInputData);
176176
}
177-
self.modify(|regs| regs.dr.modify(|_, w| unsafe { w.wdu().bits(weekday) }));
177+
self.modify(|rtc| rtc.dr.modify(|_, w| unsafe { w.wdu().bits(weekday) }));
178178

179179
Ok(())
180180
}
@@ -184,7 +184,7 @@ impl Rtcc for Rtc {
184184
return Err(Error::InvalidInputData);
185185
}
186186
let (dt, du) = bcd2_encode(day as u32)?;
187-
self.modify(|regs| regs.dr.modify(|_, w| w.dt().bits(dt).du().bits(du)));
187+
self.modify(|rtc| rtc.dr.modify(|_, w| w.dt().bits(dt).du().bits(du)));
188188

189189
Ok(())
190190
}
@@ -194,7 +194,7 @@ impl Rtcc for Rtc {
194194
return Err(Error::InvalidInputData);
195195
}
196196
let (mt, mu) = bcd2_encode(month as u32)?;
197-
self.modify(|regs| regs.dr.modify(|_, w| w.mt().bit(mt > 0).mu().bits(mu)));
197+
self.modify(|rtc| rtc.dr.modify(|_, w| w.mt().bit(mt > 0).mu().bits(mu)));
198198

199199
Ok(())
200200
}
@@ -204,7 +204,7 @@ impl Rtcc for Rtc {
204204
return Err(Error::InvalidInputData);
205205
}
206206
let (yt, yu) = bcd2_encode(year as u32)?;
207-
self.modify(|regs| regs.dr.modify(|_, w| w.yt().bits(yt).yu().bits(yu)));
207+
self.modify(|rtc| rtc.dr.modify(|_, w| w.yt().bits(yt).yu().bits(yu)));
208208

209209
Ok(())
210210
}
@@ -220,7 +220,7 @@ impl Rtcc for Rtc {
220220
let (mt, mu) = bcd2_encode(date.month())?;
221221
let (dt, du) = bcd2_encode(date.day())?;
222222

223-
self.regs.dr.write(|w| {
223+
self.rtc.dr.write(|w| {
224224
w.dt().bits(dt);
225225
w.du().bits(du);
226226
w.mt().bit(mt > 0);
@@ -246,7 +246,7 @@ impl Rtcc for Rtc {
246246
let (mnt, mnu) = bcd2_encode(date.minute())?;
247247
let (st, su) = bcd2_encode(date.second())?;
248248

249-
self.regs.dr.write(|w| {
249+
self.rtc.dr.write(|w| {
250250
w.dt().bits(dt);
251251
w.du().bits(du);
252252
w.mt().bit(mt > 0);
@@ -255,7 +255,7 @@ impl Rtcc for Rtc {
255255
w.yu().bits(yu)
256256
});
257257

258-
self.regs.tr.write(|w| {
258+
self.rtc.tr.write(|w| {
259259
w.ht().bits(ht);
260260
w.hu().bits(hu);
261261
w.mnt().bits(mnt);
@@ -269,19 +269,19 @@ impl Rtcc for Rtc {
269269
}
270270

271271
fn get_seconds(&mut self) -> Result<u8, Self::Error> {
272-
let tr = self.regs.tr.read();
272+
let tr = self.rtc.tr.read();
273273
let seconds = bcd2_decode(tr.st().bits(), tr.su().bits());
274274
Ok(seconds as u8)
275275
}
276276

277277
fn get_minutes(&mut self) -> Result<u8, Self::Error> {
278-
let tr = self.regs.tr.read();
278+
let tr = self.rtc.tr.read();
279279
let minutes = bcd2_decode(tr.mnt().bits(), tr.mnu().bits());
280280
Ok(minutes as u8)
281281
}
282282

283283
fn get_hours(&mut self) -> Result<Hours, Self::Error> {
284-
let tr = self.regs.tr.read();
284+
let tr = self.rtc.tr.read();
285285
let hours = bcd2_decode(tr.ht().bits(), tr.hu().bits());
286286
if self.is_24h_fmt() {
287287
return Ok(Hours::H24(hours as u8));
@@ -306,26 +306,26 @@ impl Rtcc for Rtc {
306306
}
307307

308308
fn get_weekday(&mut self) -> Result<u8, Self::Error> {
309-
let dr = self.regs.dr.read();
309+
let dr = self.rtc.dr.read();
310310
let weekday = bcd2_decode(dr.wdu().bits(), 0x00);
311311
Ok(weekday as u8)
312312
}
313313

314314
fn get_day(&mut self) -> Result<u8, Self::Error> {
315-
let dr = self.regs.dr.read();
315+
let dr = self.rtc.dr.read();
316316
let day = bcd2_decode(dr.dt().bits(), dr.du().bits());
317317
Ok(day as u8)
318318
}
319319

320320
fn get_month(&mut self) -> Result<u8, Self::Error> {
321-
let dr = self.regs.dr.read();
321+
let dr = self.rtc.dr.read();
322322
let mt: u8 = if dr.mt().bit() { 1 } else { 0 };
323323
let month = bcd2_decode(mt, dr.mu().bits());
324324
Ok(month as u8)
325325
}
326326

327327
fn get_year(&mut self) -> Result<u16, Self::Error> {
328-
let dr = self.regs.dr.read();
328+
let dr = self.rtc.dr.read();
329329
let year = bcd2_decode(dr.yt().bits(), dr.yu().bits());
330330
Ok(year as u16)
331331
}

0 commit comments

Comments
 (0)