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Updated changelog with SPI changes
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CHANGELOG.md

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@@ -15,17 +15,32 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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- Support for the onboard real-time clock (RTC) ([#136](https://github.com/stm32-rs/stm32f3xx-hal/pull/136))
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- Enable DMA for USART on `stm32f302` devices ([#139](https://github.com/stm32-rs/stm32f3xx-hal/pull/139))
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- Basic CAN bus support ([#100](https://github.com/stm32-rs/stm32f3xx-hal/pull/100))
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- Impls for all SPI pins for all `stm32f302` sub-targets, `stm32f303`
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subtargets, `stm32f3x8` targets, `stm32f334`, and `stm32f373`
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([#99](https://github.com/stm32-rs/stm32f3xx-hal/pull/99))
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- SPI4 peripheral for supported
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devices. ([#99](https://github.com/stm32-rs/stm32f3xx-hal/pull/99))
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### Changed
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- Introduced auto-generated GPIO mappings based on the STM32CubeMX database
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([#129](https://github.com/stm32-rs/stm32f3xx-hal/pull/129))
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- Fixed [#151][] not being
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able to generate 72 MHz HCLK for stm32f303xc devices ([#152](https://github.com/stm32-rs/stm32f3xx-hal/pull/152))
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### Fixed
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- Fixed [#151][] not being able to generate 72 MHz HCLK for stm32f303xc devices
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([#152](https://github.com/stm32-rs/stm32f3xx-hal/pull/152))
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[#151]: https://github.com/stm32-rs/stm32f3xx-hal/issues/151
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### Breaking Changes
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- Removed impl for `SckPin<SPI2>` for `PB13<AF5>` from `stm32f328` and
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`stm32f378` targets. ([#99](https://github.com/stm32-rs/stm32f3xx-hal/pull/99))
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- Removed SPI1 support for `stm32f302x6` and `stm32f302x8` sub-targets
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and `stm32f318` target. ([#99](https://github.com/stm32-rs/stm32f3xx-hal/pull/99))
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## [v0.5.0] - 2020-07-21
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### Added
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external oscillator clock on most devices. Some devices have even the
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possibility to divide the internal oscillator clock.
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### Breaking changes
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- The feature gate requires you to select a subvariant if possible. ([#75](https://github.com/stm32-rs/stm32f3xx-hal/pull/75))

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