@@ -13,10 +13,14 @@ use cast::u8;
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#[ derive( Debug ) ]
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#[ non_exhaustive]
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pub enum Error {
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- /// Bus error
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- Bus ,
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/// Arbitration loss
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Arbitration ,
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+ /// Bus error
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+ Bus ,
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+ /// Bus busy
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+ Busy ,
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+ /// Not Acknowledge received
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+ Nack ,
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// Overrun, // slave mode only
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// Pec, // SMBUS mode only
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// Timeout, // SMBUS mode only
@@ -57,15 +61,21 @@ macro_rules! busy_wait {
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( $i2c: expr, $flag: ident, $variant: ident) => {
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loop {
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let isr = $i2c. isr. read( ) ;
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+ let icr = & $i2c. icr;
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- if isr. $flag( ) . $variant( ) {
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- break ;
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+ if isr. arlo( ) . is_lost( ) {
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+ icr. write( |w| w. arlocf( ) . clear( ) ) ;
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+ return Err ( Error :: Arbitration ) ;
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} else if isr. berr( ) . is_error( ) {
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+ icr. write( |w| w. berrcf( ) . clear( ) ) ;
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return Err ( Error :: Bus ) ;
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- } else if isr. arlo( ) . is_lost( ) {
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- return Err ( Error :: Arbitration ) ;
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- } else {
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- // try again
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+ } else if isr. nackf( ) . is_nack( ) {
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+ while $i2c. isr. read( ) . stopf( ) . is_no_stop( ) { }
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+ icr. write( |w| w. nackcf( ) . clear( ) ) ;
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+ icr. write( |w| w. stopcf( ) . clear( ) ) ;
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+ return Err ( Error :: Nack ) ;
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+ } else if isr. $flag( ) . $variant( ) {
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+ break ;
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}
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}
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} ;
@@ -181,34 +191,52 @@ macro_rules! hal {
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impl <PINS > Read for I2c <$I2CX, PINS > {
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type Error = Error ;
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fn read( & mut self , addr: u8 , buffer: & mut [ u8 ] ) -> Result <( ) , Self :: Error > {
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- // TODO support transfers of more than 255 bytes
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- assert!( buffer. len( ) < 256 && buffer. len( ) > 0 ) ;
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-
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- // TODO do we have to explicitly wait here if the bus is busy (e.g. another
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- // master is communicating)?
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-
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- // START and prepare to receive `bytes`
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- self . i2c. cr2. write( |w| {
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- w. sadd( )
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- . bits( u16 :: from( addr << 1 ) )
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- . rd_wrn( )
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- . read( )
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- . nbytes( )
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- . bits( buffer. len( ) as u8 )
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- . start( )
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- . start( )
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- . autoend( )
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- . automatic( )
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- } ) ;
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+ assert!( buffer. len( ) > 0 ) ;
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- for byte in buffer {
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- // Wait until we have received something
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- busy_wait!( self . i2c, rxne, is_not_empty) ;
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+ // Detect Bus busy
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+ if self . i2c. isr. read( ) . busy( ) . is_busy( ) {
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+ return Err ( Error :: Busy ) ;
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+ }
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- * byte = self . i2c. rxdr. read( ) . rxdata( ) . bits( ) ;
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+ let end = buffer. len( ) / 0xFF ;
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+
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+ // Process 255 bytes at a time
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+ for ( i, buffer) in buffer. chunks_mut( 0xFF ) . enumerate( ) {
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+ // Prepare to receive `bytes`
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+ self . i2c. cr2. modify( |_, w| {
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+ if i == 0 {
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+ w
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+ . add10( ) . bit7( )
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+ . sadd( ) . bits( ( addr << 1 ) as u16 )
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+ . rd_wrn( ) . read( )
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+ . start( ) . start( ) ;
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+ }
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+ w. nbytes( ) . bits( buffer. len( ) as u8 ) ;
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+ if i != end {
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+ w. reload( ) . not_completed( )
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+ } else {
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+ w. reload( ) . completed( ) . autoend( ) . automatic( )
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+ }
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+ } ) ;
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+
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+ for byte in buffer {
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+ // Wait until we have received something
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+ busy_wait!( self . i2c, rxne, is_not_empty) ;
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+
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+ * byte = self . i2c. rxdr. read( ) . rxdata( ) . bits( ) ;
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+ }
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+
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+ if i != end {
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+ // Wait until the last transmission is finished
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+ busy_wait!( self . i2c, tcr, is_complete) ;
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+ }
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}
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// automatic STOP
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+ // Wait until the last transmission is finished
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+ busy_wait!( self . i2c, stopf, is_stop) ;
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+
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+ self . i2c. icr. write( |w| w. stopcf( ) . clear( ) ) ;
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Ok ( ( ) )
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}
@@ -218,37 +246,67 @@ macro_rules! hal {
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type Error = Error ;
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fn write( & mut self , addr: u8 , bytes: & [ u8 ] ) -> Result <( ) , Error > {
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- // TODO support transfers of more than 255 bytes
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- assert!( bytes. len( ) < 256 && bytes. len( ) > 0 ) ;
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-
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- // START and prepare to send `bytes`
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- self . i2c. cr2. modify( |_, w| {
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- w. sadd( )
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- . bits( u16 :: from( addr << 1 ) )
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- . rd_wrn( )
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- . write( )
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- . nbytes( )
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- . bits( bytes. len( ) as u8 )
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- . start( )
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- . start( )
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- . autoend( )
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- . automatic( )
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- } ) ;
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-
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- for byte in bytes {
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- // Wait until we are allowed to send data (START has been ACKed or last byte
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- // when through)
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- busy_wait!( self . i2c, txis, is_empty) ;
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-
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- // put byte on the wire
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- // NOTE(write): writes all non-reserved bits.
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- self . i2c. txdr. write( |w| w. txdata( ) . bits( * byte) ) ;
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+ // Detect Bus busy
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+ if self . i2c. isr. read( ) . busy( ) . is_busy( ) {
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+ return Err ( Error :: Busy ) ;
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}
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- // Wait until the last transmission is finished ???
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- // busy_wait!(self.i2c, busy);
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+ if bytes. len( ) == 0 {
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+ // 0 byte write
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+ self . i2c. cr2. modify( |_, w| {
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+ w
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+ . add10( ) . bit7( )
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+ . sadd( ) . bits( ( addr << 1 ) as u16 )
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+ . rd_wrn( ) . write( )
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+ . nbytes( ) . bits( 0 )
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+ . reload( ) . completed( )
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+ . autoend( ) . automatic( )
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+ . start( ) . start( )
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+ } ) ;
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+ } else {
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+ let end = bytes. len( ) / 0xFF ;
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+
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+ // Process 255 bytes at a time
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+ for ( i, bytes) in bytes. chunks( 0xFF ) . enumerate( ) {
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+ // Prepare to send `bytes`
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+ self . i2c. cr2. modify( |_, w| {
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+ if i == 0 {
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+ w
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+ . add10( ) . bit7( )
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+ . sadd( ) . bits( ( addr << 1 ) as u16 )
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+ . rd_wrn( ) . write( )
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+ . start( ) . start( ) ;
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+ }
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+ w. nbytes( ) . bits( bytes. len( ) as u8 ) ;
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+ if i != end {
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+ w. reload( ) . not_completed( )
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+ } else {
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+ w. reload( ) . completed( ) . autoend( ) . automatic( )
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+ }
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+ } ) ;
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+
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+ for byte in bytes {
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+ // Wait until we are allowed to send data
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+ // (START has been ACKed or last byte went through)
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+ busy_wait!( self . i2c, txis, is_empty) ;
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+
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+ // Put byte on the wire
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+ // NOTE(write): Writes all non-reserved bits.
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+ self . i2c. txdr. write( |w| w. txdata( ) . bits( * byte) ) ;
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+ }
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+
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+ if i != end {
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+ // Wait until the last transmission is finished
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+ busy_wait!( self . i2c, tcr, is_complete) ;
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+ }
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+ }
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+ }
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// automatic STOP
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+ // Wait until the last transmission is finished
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+ busy_wait!( self . i2c, stopf, is_stop) ;
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+
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+ self . i2c. icr. write( |w| w. stopcf( ) . clear( ) ) ;
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Ok ( ( ) )
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}
@@ -263,62 +321,94 @@ macro_rules! hal {
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bytes: & [ u8 ] ,
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buffer: & mut [ u8 ] ,
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) -> Result <( ) , Error > {
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- // TODO support transfers of more than 255 bytes
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- assert!( bytes. len( ) < 256 && bytes. len( ) > 0 ) ;
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- assert!( buffer. len( ) < 256 && buffer. len( ) > 0 ) ;
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-
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- // TODO do we have to explicitly wait here if the bus is busy (e.g. another
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- // master is communicating)?
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-
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- // START and prepare to send `bytes`
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- self . i2c. cr2. modify( |_, w| {
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- w. sadd( )
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- . bits( u16 :: from( addr << 1 ) )
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- . rd_wrn( )
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- . write( )
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- . nbytes( )
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- . bits( bytes. len( ) as u8 )
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- . start( )
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- . start( )
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- . autoend( )
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- . software( )
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- } ) ;
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+ assert!( bytes. len( ) > 0 && buffer. len( ) > 0 ) ;
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- for byte in bytes {
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- // Wait until we are allowed to send data
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- // (START has been ACKed or last byte went through):
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- busy_wait! ( self . i2c , txis , is_empty ) ;
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+ // Detect Bus busy
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+ if self . i2c . isr . read ( ) . busy ( ) . is_busy ( ) {
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+ return Err ( Error :: Busy ) ;
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+ }
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- // put byte into TXDR
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- // NOTE(write): writes all non-reserved bits.
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- self . i2c. txdr. write( |w| w. txdata( ) . bits( * byte) ) ;
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+ let end = buffer. len( ) / 0xFF ;
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+
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+ // Process 255 bytes at a time
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+ for ( i, bytes) in bytes. chunks( 0xFF ) . enumerate( ) {
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+ // Prepare to send `bytes`
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+ self . i2c. cr2. modify( |_, w| {
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+ if i == 0 {
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+ w
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+ . add10( ) . bit7( )
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+ . sadd( ) . bits( ( addr << 1 ) as u16 )
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+ . rd_wrn( ) . write( )
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+ . start( ) . start( ) ;
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+ }
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+ w. nbytes( ) . bits( bytes. len( ) as u8 ) ;
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+ if i != end {
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+ w. reload( ) . not_completed( )
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+ } else {
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+ w. reload( ) . completed( ) . autoend( ) . software( )
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+ }
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+ } ) ;
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+
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+ for byte in bytes {
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+ // Wait until we are allowed to send data
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+ // (START has been ACKed or last byte went through)
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+ busy_wait!( self . i2c, txis, is_empty) ;
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+
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+ // Put byte on the wire
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+ // NOTE(write): Writes all non-reserved bits.
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+ self . i2c. txdr. write( |w| w. txdata( ) . bits( * byte) ) ;
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+ }
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+
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+ if i != end {
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+ // Wait until the last transmission is finished
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+ busy_wait!( self . i2c, tcr, is_complete) ;
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+ }
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}
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- // Wait until the last byte transmission is finished:
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+ // Wait until the last transmission is finished
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busy_wait!( self . i2c, tc, is_complete) ;
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- // reSTART and prepare to receive bytes into `buffer`
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- self . i2c. cr2. modify( |_, w| {
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- w. sadd( )
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- . bits( u16 :: from( addr << 1 ) )
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- . rd_wrn( )
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- . read( )
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- . nbytes( )
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- . bits( buffer. len( ) as u8 )
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- . start( )
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- . start( )
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- . autoend( )
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- . automatic( )
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- } ) ;
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-
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- for byte in buffer {
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- // Wait until we have received something
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- busy_wait!( self . i2c, rxne, is_not_empty) ;
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-
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- * byte = self . i2c. rxdr. read( ) . rxdata( ) . bits( ) ;
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+ // restart
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+
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+ let end = buffer. len( ) / 0xFF ;
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+
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+ // Process 255 bytes at a time
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+ for ( i, buffer) in buffer. chunks_mut( 0xFF ) . enumerate( ) {
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+ // Prepare to receive `bytes`
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+ self . i2c. cr2. modify( |_, w| {
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+ if i == 0 {
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+ w
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+ . add10( ) . bit7( )
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+ . sadd( ) . bits( ( addr << 1 ) as u16 )
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+ . rd_wrn( ) . read( )
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+ . start( ) . start( ) ;
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+ }
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+ w. nbytes( ) . bits( buffer. len( ) as u8 ) ;
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+ if i != end {
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+ w. reload( ) . not_completed( )
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+ } else {
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+ w. reload( ) . completed( ) . autoend( ) . automatic( )
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+ }
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+ } ) ;
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+
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+ for byte in buffer {
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+ // Wait until we have received something
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+ busy_wait!( self . i2c, rxne, is_not_empty) ;
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+
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+ * byte = self . i2c. rxdr. read( ) . rxdata( ) . bits( ) ;
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+ }
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+
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+ if i != end {
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+ // Wait until the last transmission is finished
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+ busy_wait!( self . i2c, tcr, is_complete) ;
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+ }
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}
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// automatic STOP
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+ // Wait until the last transmission is finished
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+ busy_wait!( self . i2c, stopf, is_stop) ;
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+
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+ self . i2c. icr. write( |w| w. stopcf( ) . clear( ) ) ;
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Ok ( ( ) )
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}
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