Release 0.8.1

Author: Sh3Rm4n

CHANGELOG.md

@@ -32,6 +32,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
   To disable that behavior, set `default-features = false`. ([#283])
 - The MSRV was bumped to 1.52 ([#283])
 
+## [v0.8.1] - 2021-10-27
+
 ### Fixed
 
 - ADC Channel SMP Register mismatch. ([#291])
@@ -590,6 +592,7 @@ let clocks = rcc
 [#2]: https://github.com/stm32-rs/stm32f3xx-hal/pull/2
 
 <!-- cargo-release: latest tag -->
+[v0.8.1]: https://github.com/stm32-rs/stm32f3xx-hal/releases/tag/v0.8.1
 [v0.8.0]: https://github.com/stm32-rs/stm32f3xx-hal/releases/tag/v0.8.0
 [v0.7.0]: https://github.com/stm32-rs/stm32f3xx-hal/releases/tag/v0.7.0
 [v0.6.1]: https://github.com/stm32-rs/stm32f3xx-hal/releases/tag/v0.6.1

Cargo.toml

@@ -13,7 +13,7 @@ name = "stm32f3xx-hal"
 readme = "README.md"
 repository = "https://github.com/stm32-rs/stm32f3xx-hal"
 documentation = "https://docs.rs/stm32f3xx-hal"
-version = "0.8.0"
+version = "0.8.1"
 exclude = [
     "codegen",
     ".markdownlint.yml"

README.md

@@ -57,7 +57,7 @@ cortex-m-rt = { version = "0.6.13", features = ["device"] }
 # Panic behaviour, see https://crates.io/keywords/panic-impl for alternatives
 panic-halt = "0.2.0"
 # Replace stm32f303xc with your target chip, see next section for more info
-stm32f3xx-hal = { version = "0.8.0", features = ["ld", "rt", "stm32f303xc"] }
+stm32f3xx-hal = { version = "0.8.1", features = ["ld", "rt", "stm32f303xc"] }
 ```
 
 We also need to tell Rust about target architecture and how to link our

src/adc.rs

@@ -7,7 +7,7 @@
 //! It can be built for the STM32F3Discovery running
 //! `cargo build --example adc --features=stm32f303xc`
 //!
-//! [examples/adc.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.8.0/examples/adc.rs
+//! [examples/adc.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.8.1/examples/adc.rs
 
 use cortex_m::asm;
 use embedded_hal::adc::{Channel, OneShot};

src/can.rs

@@ -9,7 +9,7 @@
 //!
 //! A usage example of the can peripheral can be found at [examples/can.rs]
 //!
-//! [examples/can.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.8.0/examples/can.rs
+//! [examples/can.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.8.1/examples/can.rs
 
 use crate::gpio::{gpioa, gpiob};
 use crate::gpio::{PushPull, AF9};

src/dma.rs

@@ -6,7 +6,7 @@
 //!
 //! An example how to use DMA for serial, can be found at [examples/serial_dma.rs]
 //!
-//! [examples/serial_dma.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.8.0/examples/serial_dma.rs
+//! [examples/serial_dma.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.8.1/examples/serial_dma.rs
 
 // To learn about most of the ideas implemented here, check out the DMA section
 // of the Embedonomicon: https://docs.rust-embedded.org/embedonomicon/dma.html

src/gpio.rs

@@ -58,7 +58,7 @@
 //!
 //! [InputPin]: embedded_hal::digital::v2::InputPin
 //! [OutputPin]: embedded_hal::digital::v2::OutputPin
-//! [examples/toggle.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.8.0/examples/toggle.rs
+//! [examples/toggle.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.8.1/examples/toggle.rs
 
 use core::{convert::Infallible, marker::PhantomData};
 
@@ -332,7 +332,7 @@ impl<Gpio, Index, Mode> crate::private::Sealed for Pin<Gpio, Index, Mode> {}
 ///
 /// See [examples/gpio_erased.rs] as an example.
 ///
-/// [examples/gpio_erased.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.8.0/examples/gpio_erased.rs
+/// [examples/gpio_erased.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.8.1/examples/gpio_erased.rs
 pub type PXx<Mode> = Pin<Gpiox, Ux, Mode>;
 
 impl<Gpio, Mode, const X: u8> Pin<Gpio, U<X>, Mode> {

src/i2c.rs

@@ -4,7 +4,7 @@
 //!
 //! A usage example of the i2c peripheral can be found at [examples/i2c_scanner.rs]
 //!
-//! [examples/i2c_scanner.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.8.0/examples/i2c_scanner.rs
+//! [examples/i2c_scanner.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.8.1/examples/i2c_scanner.rs
 
 use core::{convert::TryFrom, ops::Deref};
 

src/lib.rs

@@ -57,7 +57,7 @@
 
  For more information, see the [README][].
 
- [README]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.8.0/README.md#selecting-the-right-chip
+ [README]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.8.1/README.md#selecting-the-right-chip
 
  ### `ld`
 

src/spi.rs

@@ -4,7 +4,7 @@
 //!
 //! A usage example of the can peripheral can be found at [examples/spi.rs]
 //!
-//! [examples/spi.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.8.0/examples/spi.rs
+//! [examples/spi.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.8.1/examples/spi.rs
 
 use core::{fmt, marker::PhantomData, ops::Deref, ptr};
 
@@ -194,7 +194,7 @@ impl<SPI, Sck, Miso, Mosi, WORD> Spi<SPI, (Sck, Miso, Mosi), WORD> {
     ///
     /// ```
     ///
-    /// To get a better example, look [here](https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.8.0/examples/spi.rs).
+    /// To get a better example, look [here](https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.8.1/examples/spi.rs).
     ///
     // TODO(Sh3Rm4n): See alternative modes provided besides FullDuplex (as listed in Stm32CubeMx).
     pub fn new<Config>(