Implement all SPI pins for STM32F303

Author: danielgallagher0

src/spi.rs

@@ -9,7 +9,17 @@ use crate::pac::{
     SPI1, SPI2, SPI3,
 };
 use crate::stm32::spi1;
+#[cfg(any(
+    feature = "stm32f303xb",
+    feature = "stm32f303xc",
+    feature = "stm32f303xd",
+    feature = "stm32f303xe"
+))]
+use crate::stm32::SPI4;
+use nb;
 
+#[cfg(feature = "stm32f303")]
+use crate::gpio::gpioa::{PA10, PA11};
 use crate::gpio::gpioa::{PA5, PA6, PA7};
 #[cfg(any(
     feature = "stm32f301",
@@ -23,7 +33,23 @@ use crate::gpio::gpioa::{PA5, PA6, PA7};
 ))]
 use crate::gpio::gpiob::PB13;
 use crate::gpio::gpiob::{PB14, PB15, PB5};
+#[cfg(feature = "stm32f303")]
+use crate::gpio::gpiob::{PB3, PB4};
 use crate::gpio::gpioc::{PC10, PC11, PC12};
+#[cfg(any(
+    feature = "stm32f303xb",
+    feature = "stm32f303xc",
+    feature = "stm32f303xd",
+    feature = "stm32f303xe"
+))]
+use crate::gpio::gpioe::{PE12, PE13, PE14, PE2, PE5, PE6};
+#[cfg(any(
+    feature = "stm32f303xb",
+    feature = "stm32f303xc",
+    feature = "stm32f303xd",
+    feature = "stm32f303xe"
+))]
+use crate::gpio::gpiof::{PF1, PF10, PF9};
 use crate::gpio::{AF5, AF6};
 use crate::rcc::Clocks;
 #[cfg(any(
@@ -75,7 +101,8 @@ pub unsafe trait MisoPin<SPI> {}
 pub unsafe trait MosiPin<SPI> {}
 
 unsafe impl SckPin<SPI1> for PA5<AF5> {}
-// unsafe impl SckPin<SPI1> for PB3<AF5> {}
+#[cfg(feature = "stm32f303")]
+unsafe impl SckPin<SPI1> for PB3<AF5> {}
 
 #[cfg(any(
     feature = "stm32f301",
@@ -88,26 +115,99 @@ unsafe impl SckPin<SPI1> for PA5<AF5> {}
     feature = "stm32f398"
 ))]
 unsafe impl SckPin<SPI2> for PB13<AF5> {}
+#[cfg(any(
+    feature = "stm32f303xb",
+    feature = "stm32f303xc",
+    feature = "stm32f303xd",
+    feature = "stm32f303xe"
+))]
+unsafe impl SckPin<SPI2> for PF1<AF5> {}
+#[cfg(any(
+    feature = "stm32f303xb",
+    feature = "stm32f303xc",
+    feature = "stm32f303xd",
+    feature = "stm32f303xe"
+))]
+unsafe impl SckPin<SPI2> for PF9<AF5> {}
+#[cfg(any(
+    feature = "stm32f303xb",
+    feature = "stm32f303xc",
+    feature = "stm32f303xd",
+    feature = "stm32f303xe"
+))]
+unsafe impl SckPin<SPI2> for PF10<AF5> {}
 
-// unsafe impl SckPin<SPI3> for PB3<AF6> {}
+#[cfg(feature = "stm32f303")]
+unsafe impl SckPin<SPI3> for PB3<AF6> {}
 unsafe impl SckPin<SPI3> for PC10<AF6> {}
 
+#[cfg(any(
+    feature = "stm32f303xb",
+    feature = "stm32f303xc",
+    feature = "stm32f303xd",
+    feature = "stm32f303xe"
+))]
+unsafe impl SckPin<SPI4> for PE2<AF5> {}
+#[cfg(any(
+    feature = "stm32f303xb",
+    feature = "stm32f303xc",
+    feature = "stm32f303xd",
+    feature = "stm32f303xe"
+))]
+unsafe impl SckPin<SPI4> for PE12<AF5> {}
+
 unsafe impl MisoPin<SPI1> for PA6<AF5> {}
-// unsafe impl MisoPin<SPI1> for PB4<AF5> {}
+#[cfg(feature = "stm32f303")]
+unsafe impl MisoPin<SPI1> for PB4<AF5> {}
 
+#[cfg(any(feature = "stm32f303"))]
+unsafe impl MisoPin<SPI2> for PA10<AF5> {}
 unsafe impl MisoPin<SPI2> for PB14<AF5> {}
 
-// unsafe impl MisoPin<SPI3> for PB4<AF6> {}
+#[cfg(any(
+    feature = "stm32f303xb",
+    feature = "stm32f303xc",
+    feature = "stm32f303xd",
+    feature = "stm32f303xe"
+))]
+unsafe impl MisoPin<SPI4> for PE5<AF5> {}
+#[cfg(any(
+    feature = "stm32f303xb",
+    feature = "stm32f303xc",
+    feature = "stm32f303xd",
+    feature = "stm32f303xe"
+))]
+unsafe impl MisoPin<SPI4> for PE13<AF5> {}
+
+#[cfg(any(feature = "stm32f303"))]
+unsafe impl MisoPin<SPI3> for PB4<AF6> {}
 unsafe impl MisoPin<SPI3> for PC11<AF6> {}
 
 unsafe impl MosiPin<SPI1> for PA7<AF5> {}
 unsafe impl MosiPin<SPI1> for PB5<AF5> {}
 
+#[cfg(any(feature = "stm32f303"))]
+unsafe impl MosiPin<SPI2> for PA11<AF5> {}
 unsafe impl MosiPin<SPI2> for PB15<AF5> {}
 
 unsafe impl MosiPin<SPI3> for PB5<AF6> {}
 unsafe impl MosiPin<SPI3> for PC12<AF6> {}
 
+#[cfg(any(
+    feature = "stm32f303xb",
+    feature = "stm32f303xc",
+    feature = "stm32f303xd",
+    feature = "stm32f303xe"
+))]
+unsafe impl MosiPin<SPI4> for PE6<AF5> {}
+#[cfg(any(
+    feature = "stm32f303xb",
+    feature = "stm32f303xc",
+    feature = "stm32f303xd",
+    feature = "stm32f303xe"
+))]
+unsafe impl MosiPin<SPI4> for PE14<AF5> {}
+
 pub trait Word {
     fn register_config() -> (FRXTH_A, DS_A);
 }