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Add type alias for test setup
1 parent 2d59e5b commit a9b8534

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7 files changed

+116
-74
lines changed

7 files changed

+116
-74
lines changed

‎testsuite/Cargo.toml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,7 @@ harness = false
3636
name = "watchdog"
3737
harness = false
3838

39-
[dev-dependencies]
39+
[dependencies]
4040
cfg-if = "1.0"
4141
cortex-m = "0.7.0"
4242
defmt = "0.2.0"
@@ -49,7 +49,7 @@ nb = "1.0.0"
4949

5050
[features]
5151
# enable all defmt logging levels
52-
default = ["defmt-trace", "stm32f3xx-hal/stm32f303xc"]
52+
default = ["defmt-trace", "stm32f3xx-hal/stm32f303xc", "stm32f3xx-hal/ld"]
5353

5454
# do not modify these features
5555
defmt-default = []

‎testsuite/src/lib.rs

Lines changed: 45 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,45 @@
1+
/*!
2+
# Testsuite
3+
4+
This testsuite module defines the test setup via the pin type setup.
5+
6+
Because of the ease of use, the tests are written for the STM32F3Discovery board.
7+
8+
To easier run any test on other hardware, some type abstractions are provided.
9+
In most cases, many pins are pairs of GPIOs connected to each other,
10+
so that one one pin can confirm the correct behavior of the other pin and the underlying
11+
peripheral.
12+
*/
13+
#![no_std]
14+
15+
use defmt_rtt as _;
16+
use panic_probe as _;
17+
18+
use hal::gpio::{gpioa::*, gpiob::*, gpioc::*};
19+
use stm32f3xx_hal as hal;
20+
21+
/// Pin connected to Vdd, which should be 3.3 Volts
22+
pub type VddPin<T> = PC2<T>;
23+
/// Pin connected to Ground / GND
24+
pub type GroundPin<T> = PC3<T>;
25+
26+
/// Pin Pair directly connected to each other.
27+
///
28+
/// Used for basic GPIO tests
29+
pub struct GenericPair<T1, T2>(pub PC0<T1>, pub PC1<T2>);
30+
31+
/// Pin Pair directly connected to each other.
32+
///
33+
/// This pin pair does support UART1 and SPI.
34+
/// So this pin can be repurposed fore many tests.
35+
pub struct SerialPair<T1, T2>(pub PA9<T1>, pub PA10<T2>);
36+
37+
/// Pin Pair directly connected to each other.
38+
///
39+
/// This is used for UART, where UART2(TX) is connected to UART3(RX)
40+
pub struct CrossSerialPair1<T1, T2>(pub PA2<T1>, pub PB11<T2>);
41+
42+
/// Pin Pair directly connected to each other.
43+
///
44+
/// This is used for UART, where UART3(TX) is connected to UART2(RX)
45+
pub struct CrossSerialPair2<T1, T2>(pub PB10<T1>, pub PA3<T2>);

‎testsuite/tests/gpio_input.rs

Lines changed: 9 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,7 @@
11
#![no_std]
22
#![no_main]
33

4-
use defmt_rtt as _;
5-
use panic_probe as _;
4+
use testsuite as _;
65

76
use stm32f3xx_hal as hal;
87

@@ -15,29 +14,27 @@ struct State {
1514

1615
#[defmt_test::tests]
1716
mod tests {
17+
use super::*;
1818
use defmt::{assert, unwrap};
1919
use stm32f3xx_hal::{pac, prelude::*};
20+
use testsuite::{GroundPin, VddPin};
2021

2122
#[init]
2223
fn init() -> super::State {
2324
let dp = unwrap!(pac::Peripherals::take());
2425

2526
let mut rcc = dp.RCC.constrain();
2627
let mut gpioc = dp.GPIOC.split(&mut rcc.ahb);
27-
let input_ground = gpioc
28+
let input_ground: GroundPin<Input> = gpioc
2829
.pc3
29-
.into_floating_input(&mut gpioc.moder, &mut gpioc.pupdr)
30-
.downgrade()
31-
.downgrade();
32-
let input_vdd = gpioc
30+
.into_floating_input(&mut gpioc.moder, &mut gpioc.pupdr);
31+
let input_vdd: VddPin<Input> = gpioc
3332
.pc2
34-
.into_floating_input(&mut gpioc.moder, &mut gpioc.pupdr)
35-
.downgrade()
36-
.downgrade();
33+
.into_floating_input(&mut gpioc.moder, &mut gpioc.pupdr);
3734

3835
super::State {
39-
input_ground,
40-
input_vdd,
36+
input_ground: input_ground.downgrade().downgrade(),
37+
input_vdd: input_vdd.downgrade().downgrade(),
4138
}
4239
}
4340

‎testsuite/tests/gpio_input_puller.rs

Lines changed: 14 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,7 @@
11
#![no_std]
22
#![no_main]
33

4-
use defmt_rtt as _;
5-
use panic_probe as _;
4+
use testsuite as _;
65

76
use stm32f3xx_hal as hal;
87

@@ -21,6 +20,7 @@ struct State {
2120
mod tests {
2221
use super::*;
2322
use defmt::{assert, unwrap};
23+
use testsuite::GenericPair;
2424

2525
#[init]
2626
fn init() -> super::State {
@@ -29,21 +29,22 @@ mod tests {
2929
let mut rcc = dp.RCC.constrain();
3030
let mut gpioc = dp.GPIOC.split(&mut rcc.ahb);
3131

32-
let mut observer = gpioc
33-
.pc0
34-
.into_floating_input(&mut gpioc.moder, &mut gpioc.pupdr);
35-
observer.set_internal_resistor(&mut gpioc.pupdr, Resistor::Floating);
36-
37-
let observer = observer.downgrade().downgrade();
38-
39-
let puller = gpioc
40-
.pc1
41-
.into_floating_input(&mut gpioc.moder, &mut gpioc.pupdr);
32+
let pair = GenericPair {
33+
0: gpioc
34+
.pc0
35+
.into_floating_input(&mut gpioc.moder, &mut gpioc.pupdr),
36+
1: gpioc
37+
.pc1
38+
.into_floating_input(&mut gpioc.moder, &mut gpioc.pupdr),
39+
};
40+
let mut observer = pair.0;
41+
let puller = pair.1;
4242

43+
observer.set_internal_resistor(&mut gpioc.pupdr, Resistor::Floating);
4344
let pupdr = gpioc.pupdr;
4445

4546
super::State {
46-
observer,
47+
observer: observer.downgrade().downgrade(),
4748
puller,
4849
pupdr,
4950
}

‎testsuite/tests/gpio_output_open_drain.rs

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,7 @@
11
#![no_std]
22
#![no_main]
33

4-
use defmt_rtt as _;
5-
use panic_probe as _;
4+
use testsuite as _;
65

76
use stm32f3xx_hal as hal;
87

@@ -15,9 +14,9 @@ struct State {
1514

1615
#[defmt_test::tests]
1716
mod tests {
18-
use cortex_m::asm;
1917
use defmt::{assert, unwrap};
2018
use stm32f3xx_hal::{pac, prelude::*};
19+
use testsuite::GenericPair;
2120

2221
#[init]
2322
fn init() -> super::State {
@@ -26,20 +25,21 @@ mod tests {
2625
let mut rcc = dp.RCC.constrain();
2726
let mut gpioc = dp.GPIOC.split(&mut rcc.ahb);
2827

29-
let mut input_pin = gpioc
30-
.pc0
31-
.into_floating_input(&mut gpioc.moder, &mut gpioc.pupdr);
28+
let pair = GenericPair {
29+
0: gpioc
30+
.pc0
31+
.into_floating_input(&mut gpioc.moder, &mut gpioc.pupdr),
32+
1: gpioc
33+
.pc1
34+
.into_open_drain_output(&mut gpioc.moder, &mut gpioc.otyper),
35+
};
36+
let mut input_pin = pair.0;
3237
input_pin.internal_pull_up(&mut gpioc.pupdr, true);
33-
let input_pin = input_pin.downgrade().downgrade();
34-
let output_pin = gpioc
35-
.pc1
36-
.into_open_drain_output(&mut gpioc.moder, &mut gpioc.otyper)
37-
.downgrade()
38-
.downgrade();
38+
let output_pin = pair.1;
3939

4040
super::State {
41-
input_pin,
42-
output_pin,
41+
input_pin: input_pin.downgrade().downgrade(),
42+
output_pin: output_pin.downgrade().downgrade(),
4343
}
4444
}
4545

‎testsuite/tests/gpio_output_push_pull.rs

Lines changed: 11 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@ struct State {
1818
mod tests {
1919
use super::*;
2020
use defmt::{assert, unwrap};
21+
use testsuite::GenericPair;
2122

2223
#[init]
2324
fn init() -> super::State {
@@ -26,20 +27,18 @@ mod tests {
2627
let mut rcc = dp.RCC.constrain();
2728
let mut gpioc = dp.GPIOC.split(&mut rcc.ahb);
2829

29-
let input_pin = gpioc
30-
.pc0
31-
.into_floating_input(&mut gpioc.moder, &mut gpioc.pupdr)
32-
.downgrade()
33-
.downgrade();
34-
let output_pin = gpioc
35-
.pc1
36-
.into_push_pull_output(&mut gpioc.moder, &mut gpioc.otyper)
37-
.downgrade()
38-
.downgrade();
30+
let pair = GenericPair {
31+
0: gpioc
32+
.pc0
33+
.into_floating_input(&mut gpioc.moder, &mut gpioc.pupdr),
34+
1: gpioc
35+
.pc1
36+
.into_push_pull_output(&mut gpioc.moder, &mut gpioc.otyper),
37+
};
3938

4039
super::State {
41-
input_pin,
42-
output_pin,
40+
input_pin: pair.0.downgrade().downgrade(),
41+
output_pin: pair.1.downgrade().downgrade(),
4342
}
4443
}
4544

‎testsuite/tests/uart.rs

Lines changed: 21 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,7 @@
22
#![no_main]
33

44
// TODO: Get pa9 and pa10 because these also implement spi and uart
5-
use defmt_rtt as _;
6-
use panic_probe as _;
5+
use testsuite as _;
76

87
use stm32f3xx_hal as hal;
98

@@ -32,6 +31,7 @@ const TEST_MSG: [u8; 8] = [0xD, 0xE, 0xA, 0xD, 0xB, 0xE, 0xE, 0xF];
3231
mod tests {
3332
use super::*;
3433
use defmt::{self, assert, assert_eq, unwrap};
34+
use testsuite::{SerialPair, CrossSerialPair1, CrossSerialPair2};
3535

3636
#[init]
3737
fn init() -> super::State {
@@ -43,49 +43,49 @@ mod tests {
4343
let mut gpioa = dp.GPIOA.split(&mut rcc.ahb);
4444
let mut gpiob = dp.GPIOB.split(&mut rcc.ahb);
4545

46-
let pins1 = (
47-
gpioa
46+
let serial_pair = SerialPair {
47+
0: gpioa
4848
.pa9
4949
.into_af7_push_pull(&mut gpioa.moder, &mut gpioa.otyper, &mut gpioa.afrh),
50-
gpioa
50+
1: gpioa
5151
.pa10
5252
.into_af7_push_pull(&mut gpioa.moder, &mut gpioa.otyper, &mut gpioa.afrh),
53-
);
54-
let pins2 = (
55-
gpioa
53+
};
54+
let cs_pair_1 = CrossSerialPair1 {
55+
0: gpioa
5656
.pa2
5757
.into_af7_push_pull(&mut gpioa.moder, &mut gpioa.otyper, &mut gpioa.afrl),
58-
gpioa
59-
.pa3
60-
.into_af7_open_drain(&mut gpioa.moder, &mut gpioa.otyper, &mut gpioa.afrl),
61-
);
62-
let pins3 = (
63-
gpiob
64-
.pb10
65-
.into_af7_push_pull(&mut gpiob.moder, &mut gpiob.otyper, &mut gpiob.afrh),
66-
gpiob
58+
1: gpiob
6759
.pb11
6860
.into_af7_open_drain(&mut gpiob.moder, &mut gpiob.otyper, &mut gpiob.afrh),
69-
);
61+
};
62+
let cs_pair_2 = CrossSerialPair2 {
63+
0: gpiob
64+
.pb10
65+
.into_af7_push_pull(&mut gpiob.moder, &mut gpiob.otyper, &mut gpiob.afrh),
66+
1: gpioa
67+
.pa3
68+
.into_af7_open_drain(&mut gpioa.moder, &mut gpioa.otyper, &mut gpioa.afrl),
69+
};
7070

7171
super::State {
7272
serial1: Some(Serial::usart1(
7373
dp.USART1,
74-
pins1,
74+
(serial_pair.0, serial_pair.1),
7575
9600.Bd(),
7676
clocks,
7777
&mut rcc.apb2,
7878
)),
7979
serial_slow: Some(Serial::usart2(
8080
dp.USART2,
81-
pins2,
81+
(cs_pair_1.0, cs_pair_2.1),
8282
57600.Bd(),
8383
clocks,
8484
&mut rcc.apb1,
8585
)),
8686
serial_fast: Some(Serial::usart3(
8787
dp.USART3,
88-
pins3,
88+
(cs_pair_2.0, cs_pair_1.1),
8989
115200.Bd(),
9090
clocks,
9191
&mut rcc.apb1,

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