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Fix timer typos
1 parent 84f6434 commit b1a554e

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2 files changed

+5
-5
lines changed

2 files changed

+5
-5
lines changed

src/timer.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -202,7 +202,7 @@ where
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events
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}
204204

205-
/// Check if an interrupt event happend.
205+
/// Check if an interrupt event happened.
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pub fn is_event_triggered(&self, event: Event) -> bool {
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match event {
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Event::Update => self.tim.is_sr_uief_set(),

testsuite/tests/timer.rs

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,7 @@ mod tests {
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let mut flash = dp.FLASH.constrain();
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let clocks = rcc.cfgr.freeze(&mut flash.acr);
4646

47-
// Let's use a timer, which is avaliable for every chip
47+
// Let's use a timer, which is available for every chip
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let timer = Timer::new(dp.TIM2, clocks, &mut rcc.apb1);
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let mono_timer = MonoTimer::new(cp.DWT, clocks, &mut cp.DCB);
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let delay = Delay::new(cp.SYST, clocks);
@@ -105,7 +105,7 @@ mod tests {
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106106
let deviation = (ratio - 1.).abs();
107107

108-
// Deviation is high for smaller timer durations. Higher duratinons are pretty accurate.
108+
// Deviation is high for smaller timer duration. Higher duration are pretty accurate.
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// TODO: Maybe the allowed deviation should changed depending on the duration?
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defmt::assert!(deviation < 11e-02);
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}
@@ -147,8 +147,8 @@ mod tests {
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fn TIM2() {
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INTERRUPT_FIRED.store(true, Ordering::SeqCst);
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150-
// Make it easy on ourselfs and just disable all interrupts.
151-
// This way, the interrupt rountine dooes not have to have access to the timer peripheral,
150+
// Make it easy on ourselves and just disable all interrupts.
151+
// This way, the interrupt routine does not have to have access to the timer peripheral,
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// which would mean to access the internally managed state of the test module,
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// which can't be accessed right now.
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//

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