@@ -24,6 +24,9 @@ use core::{
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sync:: atomic:: { self , Ordering } ,
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} ;
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+ #[ cfg( feature = "enumset" ) ]
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+ use enumset:: EnumSetType ;
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+
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/// Extension trait to split a DMA peripheral into independent channels
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pub trait DmaExt {
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/// The type to split the DMA into
@@ -42,6 +45,8 @@ pub trait Target {
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}
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/// An in-progress one-shot DMA transfer
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+ #[ derive( Debug ) ]
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+ #[ cfg_attr( feature = "defmt" , derive( defmt:: Format ) ) ]
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pub struct Transfer < B , C : Channel , T : Target > {
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// This is always a `Some` outside of `drop`.
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inner : Option < TransferInner < B , C , T > > ,
@@ -131,7 +136,7 @@ impl<B, C: Channel, T: Target> Transfer<B, C, T> {
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/// Is this transfer complete?
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pub fn is_complete ( & self ) -> bool {
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let inner = crate :: unwrap!( self . inner. as_ref( ) ) ;
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- inner. channel . event_occurred ( Event :: TransferComplete )
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+ inner. channel . is_event_triggered ( Event :: TransferComplete )
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}
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/// Stop this transfer and return ownership over its parts
@@ -159,6 +164,8 @@ impl<B, C: Channel, T: Target> Drop for Transfer<B, C, T> {
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}
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/// This only exists so we can implement `Drop` for `Transfer`.
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+ #[ derive( Debug ) ]
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+ #[ cfg_attr( feature = "defmt" , derive( defmt:: Format ) ) ]
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struct TransferInner < B , C , T > {
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buffer : B ,
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channel : C ,
@@ -176,6 +183,8 @@ impl<B, C: Channel, T: Target> TransferInner<B, C, T> {
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}
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/// DMA address increment mode
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+ #[ derive( Debug , Copy , Clone , PartialEq , Eq ) ]
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+ #[ cfg_attr( feature = "defmt" , derive( defmt:: Format ) ) ]
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pub enum Increment {
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/// Enable increment
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Enable ,
@@ -193,6 +202,8 @@ impl From<Increment> for cr::PINC_A {
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}
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/// Channel priority level
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+ #[ derive( Debug , Copy , Clone , PartialEq , Eq ) ]
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+ #[ cfg_attr( feature = "defmt" , derive( defmt:: Format ) ) ]
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pub enum Priority {
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/// Low
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Low ,
@@ -216,6 +227,8 @@ impl From<Priority> for cr::PL_A {
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}
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/// DMA transfer direction
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+ #[ derive( Debug , Copy , Clone , PartialEq , Eq ) ]
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+ #[ cfg_attr( feature = "defmt" , derive( defmt:: Format ) ) ]
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pub enum Direction {
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/// From memory to peripheral
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FromMemory ,
@@ -233,6 +246,10 @@ impl From<Direction> for cr::DIR_A {
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}
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/// DMA events
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+ #[ derive( Debug ) ]
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+ #[ cfg_attr( feature = "defmt" , derive( defmt:: Format ) ) ]
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+ #[ cfg_attr( feature = "enumset" , derive( EnumSetType ) ) ]
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+ #[ cfg_attr( not( feature = "enumset" ) , derive( Copy , Clone , PartialEq , Eq ) ) ]
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pub enum Event {
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/// First half of a transfer is done
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HalfTransfer ,
@@ -247,7 +264,7 @@ pub enum Event {
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/// Trait implemented by all DMA channels
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pub trait Channel : private:: Channel {
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/// Is the interrupt flag for the given event set?
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- fn event_occurred ( & self , event : Event ) -> bool ;
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+ fn is_event_triggered ( & self , event : Event ) -> bool ;
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/// Clear the interrupt flag for the given event.
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///
@@ -258,6 +275,11 @@ pub trait Channel: private::Channel {
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/// call this method with `Event::Any`.
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fn clear_event ( & mut self , event : Event ) ;
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+ /// Clear **all** interrupt event flags
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+ fn clear_events ( & mut self ) {
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+ self . clear_event ( Event :: Any ) ;
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+ }
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+
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/// Reset the control registers of this channel.
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/// This stops any ongoing transfers.
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fn reset ( & mut self ) {
@@ -357,34 +379,28 @@ pub trait Channel: private::Channel {
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self . ch ( ) . cr . modify ( |_, w| w. dir ( ) . variant ( dir) ) ;
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}
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- /// Enable the interrupt for the given event
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- fn listen ( & mut self , event : Event ) {
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- use Event :: * ;
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+ /// Enable or disable the interrupt for the specified [`Event`].
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+ fn configure_intterupt ( & mut self , event : Event , enable : bool ) {
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match event {
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- HalfTransfer => self . ch ( ) . cr . modify ( |_, w| w. htie ( ) . enabled ( ) ) ,
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- TransferComplete => self . ch ( ) . cr . modify ( |_, w| w. tcie ( ) . enabled ( ) ) ,
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- TransferError => self . ch ( ) . cr . modify ( |_, w| w. teie ( ) . enabled ( ) ) ,
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- Any => self . ch ( ) . cr . modify ( |_, w| {
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- w. htie ( ) . enabled ( ) ;
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- w. tcie ( ) . enabled ( ) ;
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- w. teie ( ) . enabled ( )
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+ Event :: HalfTransfer => self . ch ( ) . cr . modify ( |_, w| w. htie ( ) . bit ( enable ) ) ,
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+ Event :: TransferComplete => self . ch ( ) . cr . modify ( |_, w| w. tcie ( ) . bit ( enable ) ) ,
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+ Event :: TransferError => self . ch ( ) . cr . modify ( |_, w| w. teie ( ) . bit ( enable ) ) ,
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+ Event :: Any => self . ch ( ) . cr . modify ( |_, w| {
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+ w. htie ( ) . bit ( enable ) ;
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+ w. tcie ( ) . bit ( enable ) ;
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+ w. teie ( ) . bit ( enable )
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} ) ,
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}
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}
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- /// Disable the interrupt for the given event
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- fn unlisten ( & mut self , event : Event ) {
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- use Event :: * ;
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- match event {
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- HalfTransfer => self . ch ( ) . cr . modify ( |_, w| w. htie ( ) . disabled ( ) ) ,
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- TransferComplete => self . ch ( ) . cr . modify ( |_, w| w. tcie ( ) . disabled ( ) ) ,
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- TransferError => self . ch ( ) . cr . modify ( |_, w| w. teie ( ) . disabled ( ) ) ,
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- Any => self . ch ( ) . cr . modify ( |_, w| {
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- w. htie ( ) . disabled ( ) ;
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- w. tcie ( ) . disabled ( ) ;
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- w. teie ( ) . disabled ( )
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- } ) ,
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- }
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+ /// Enable the interrupt for the given [`Event`].
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+ fn enable_interrupt ( & mut self , event : Event ) {
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+ self . configure_intterupt ( event, true ) ;
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+ }
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+
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+ /// Disable the interrupt for the given [`Event`].
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+ fn disable_interrupt ( & mut self , event : Event ) {
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+ self . configure_intterupt ( event, false ) ;
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}
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/// Start a transfer
@@ -447,6 +463,8 @@ macro_rules! dma {
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}
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/// DMA channels
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+ #[ derive( Debug ) ]
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+ #[ cfg_attr( feature = "defmt" , derive( defmt:: Format ) ) ]
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pub struct Channels {
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$(
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/// Channel
@@ -464,6 +482,8 @@ macro_rules! dma {
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$(
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/// Singleton that represents a DMA channel
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+ #[ derive( Debug ) ]
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+ #[ cfg_attr( feature = "defmt" , derive( defmt:: Format ) ) ]
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pub struct $Ci {
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_0: ( ) ,
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}
@@ -476,7 +496,7 @@ macro_rules! dma {
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}
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impl Channel for $Ci {
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- fn event_occurred ( & self , event: Event ) -> bool {
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+ fn is_event_triggered ( & self , event: Event ) -> bool {
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use Event :: * ;
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// NOTE(unsafe) atomic read
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