Skip to content

Commit bd9f858

Browse files
committed
Update HSE bypass function to h7xx-hal compatible
1 parent 47f1816 commit bd9f858

File tree

2 files changed

+11
-17
lines changed

2 files changed

+11
-17
lines changed

CHANGELOG.md

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
2121
- SPI4 peripheral for supported
2222
devices. ([#99](https://github.com/stm32-rs/stm32f3xx-hal/pull/99))
2323
- Support for I2C transfer of more than 255 bytes, and 0 byte write ([#154](https://github.com/stm32-rs/stm32f3xx-hal/pull/154))
24+
- Support for HSE bypass and CSS ([#156](https://github.com/stm32-rs/stm32f3xx-hal/pull/156))
2425

2526
### Changed
2627

src/rcc.rs

Lines changed: 10 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -283,31 +283,28 @@ fn into_pre_div(div: u8) -> cfgr2::PREDIV_A {
283283
}
284284

285285
impl CFGR {
286-
/// Enable HSE (external clock) in crystal mode.
287-
/// Uses external oscillator instead of HSI (internal RC oscillator) as the clock source.
286+
/// Uses HSE (external oscillator) instead of HSI (internal RC oscillator) as the clock source.
288287
/// Will result in a hang if an external oscillator is not connected or it fails to start.
289288
pub fn use_hse<F>(mut self, freq: F) -> Self
290289
where
291290
F: Into<Hertz>,
292291
{
293292
self.hse = Some(freq.into().0);
294-
self.hse_bypass = false;
295293
self
296294
}
297295

298-
/// Enable HSE (external clock) in bypass mode.
299-
/// Uses user provided clock instead of HSI (internal RC oscillator) as the clock source.
300-
/// Will result in a hang if an external clock source is not connected.
301-
pub fn use_hse_bypass<F>(mut self, freq: F) -> Self
302-
where
303-
F: Into<Hertz>,
304-
{
305-
self.hse = Some(freq.into().0);
296+
/// Enable HSE bypass.
297+
/// Uses user provided clock signal instead of an external oscillator.
298+
/// OSC_OUT pin is free and can be used as GPIO.
299+
/// No effect if HSE is not enabled.
300+
pub fn bypass_hse(mut self) -> Self {
306301
self.hse_bypass = true;
307302
self
308303
}
309304

310305
/// Enable CSS (Clock Security System).
306+
/// System clock is automatically switched to HSI and an interrupt (CSSI) is generated
307+
/// when HSE clock failure is detected.
311308
/// No effect if HSE is not enabled.
312309
pub fn enable_css(mut self) -> Self {
313310
self.css = true;
@@ -605,12 +602,8 @@ impl CFGR {
605602
// enable HSE and wait for it to be ready
606603
if self.hse.is_some() {
607604
rcc.cr.modify(|_, w| {
608-
if self.css {
609-
w.csson().on();
610-
}
611-
if self.hse_bypass {
612-
w.hsebyp().bypassed();
613-
}
605+
w.hsebyp().bit(self.hse_bypass);
606+
w.csson().bit(self.css);
614607
w.hseon().on()
615608
});
616609

0 commit comments

Comments
 (0)