@@ -283,31 +283,28 @@ fn into_pre_div(div: u8) -> cfgr2::PREDIV_A {
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}
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impl CFGR {
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- /// Enable HSE (external clock) in crystal mode.
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- /// Uses external oscillator instead of HSI (internal RC oscillator) as the clock source.
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+ /// Uses HSE (external oscillator) instead of HSI (internal RC oscillator) as the clock source.
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/// Will result in a hang if an external oscillator is not connected or it fails to start.
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pub fn use_hse < F > ( mut self , freq : F ) -> Self
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where
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F : Into < Hertz > ,
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{
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self . hse = Some ( freq. into ( ) . 0 ) ;
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- self . hse_bypass = false ;
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self
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}
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- /// Enable HSE (external clock) in bypass mode.
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- /// Uses user provided clock instead of HSI (internal RC oscillator) as the clock source.
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- /// Will result in a hang if an external clock source is not connected.
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- pub fn use_hse_bypass < F > ( mut self , freq : F ) -> Self
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- where
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- F : Into < Hertz > ,
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- {
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- self . hse = Some ( freq. into ( ) . 0 ) ;
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+ /// Enable HSE bypass.
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+ /// Uses user provided clock signal instead of an external oscillator.
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+ /// OSC_OUT pin is free and can be used as GPIO.
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+ /// No effect if HSE is not enabled.
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+ pub fn bypass_hse ( mut self ) -> Self {
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self . hse_bypass = true ;
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self
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}
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/// Enable CSS (Clock Security System).
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+ /// System clock is automatically switched to HSI and an interrupt (CSSI) is generated
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+ /// when HSE clock failure is detected.
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/// No effect if HSE is not enabled.
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pub fn enable_css ( mut self ) -> Self {
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self . css = true ;
@@ -605,12 +602,8 @@ impl CFGR {
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// enable HSE and wait for it to be ready
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if self . hse . is_some ( ) {
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rcc. cr . modify ( |_, w| {
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- if self . css {
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- w. csson ( ) . on ( ) ;
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- }
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- if self . hse_bypass {
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- w. hsebyp ( ) . bypassed ( ) ;
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- }
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+ w. hsebyp ( ) . bit ( self . hse_bypass ) ;
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+ w. csson ( ) . bit ( self . css ) ;
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w. hseon ( ) . on ( )
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} ) ;
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