Merge pull request #318 from ferrous-systems/master

Minimal DAC driver

Author: Sh3Rm4n

CHANGELOG.md

@@ -14,6 +14,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## Unreleased
 
+### Added
+
+- Add a minimal DAC driver ([#318])
+
 ### Fixed
 
 - Missing `MosiPin` impl for `PB5` ([#322])
@@ -557,6 +561,7 @@ let clocks = rcc
 [filter]: https://defmt.ferrous-systems.com/filtering.html
 
 [#322]: https://github.com/stm32-rs/stm32f3xx-hal/pull/322
+[#318]: https://github.com/stm32-rs/stm32f3xx-hal/pull/318
 [#314]: https://github.com/stm32-rs/stm32f3xx-hal/pull/314
 [#309]: https://github.com/stm32-rs/stm32f3xx-hal/pull/309
 [#308]: https://github.com/stm32-rs/stm32f3xx-hal/pull/308

examples/dac_sine.rs

@@ -0,0 +1,52 @@
+#![no_std]
+#![no_main]
+
+//! Example usage for DAC on STM32F303
+// Based on example in stm32hal by David-OConnor
+
+use panic_semihosting as _;
+
+use cortex_m_rt::entry;
+
+use stm32f3xx_hal::{dac::Dac, pac, prelude::*};
+
+#[entry]
+/// Main Thread
+fn main() -> ! {
+    // Get peripherals, clocks and freeze them
+    let dp = pac::Peripherals::take().unwrap();
+    let mut rcc = dp.RCC.constrain();
+    // let clocks = rcc.cfgr.freeze(&mut dp.FLASH.constrain().acr);
+
+    // Set up pin PA4 as analog pin.
+    let mut gpioa = dp.GPIOA.split(&mut rcc.ahb);
+    let _dac1_out1 = gpioa.pa4.into_analog(&mut gpioa.moder, &mut gpioa.pupdr);
+
+    // set up led for blinking loop
+    let mut ok_led = gpioa
+        .pa15
+        .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper);
+
+    // set up dac1, data is twelve bits, aligned right
+    #[cfg(not(feature = "svd-f302"))]
+    let mut dac1 = Dac::new(dp.DAC1, &mut rcc.apb1);
+
+    #[cfg(feature = "svd-f302")]
+    let mut dac1 = Dac::new(dp.DAC, &mut rcc.apb1);
+
+    let mut led = true;
+
+    loop {
+        for value in (0..256).chain((0..255).rev()) {
+            dac1.write_data((4095 / 255) * value);
+            cortex_m::asm::delay(8_000);
+        }
+        if led {
+            ok_led.set_low().unwrap();
+            led = false;
+        } else {
+            ok_led.set_high().unwrap();
+            led = true;
+        }
+    }
+}

src/dac.rs

@@ -0,0 +1,46 @@
+//! Digital-to-Analog Converter
+
+// Based on stm32hal by David-OConnor
+
+use crate::rcc::{Enable, Reset, APB1};
+
+#[cfg(feature = "svd-f302")]
+use crate::pac::DAC;
+
+#[cfg(any(
+    feature = "svd-f301",
+    feature = "svd-f303",
+    feature = "svd-f373",
+    feature = "svd-f3x4",
+))]
+use crate::pac::DAC1 as DAC;
+
+/// Represents a Digital to Analog Converter (DAC) peripheral.
+pub struct Dac {
+    regs: DAC,
+}
+
+impl Dac {
+    /// Initializes the DAC peripheral.
+    pub fn new(regs: DAC, apb1: &mut APB1) -> Self {
+        DAC::enable(apb1);
+        DAC::reset(apb1);
+
+        // Enable channel 1.
+        regs.cr.modify(|_, w| w.en1().set_bit());
+
+        Self { regs }
+    }
+
+    /// Writes a sample to the Channel 1 output register.
+    ///
+    /// Only the low 12 bits of `data` will be used, the rest is ignored.
+    pub fn write_data(&mut self, data: u16) {
+        self.regs.dhr12r1.write(|w| {
+            #[allow(unused_unsafe)]
+            unsafe {
+                w.dacc1dhr().bits(data)
+            }
+        })
+    }
+}

src/lib.rs

@@ -187,6 +187,7 @@ pub mod adc;
 #[cfg(all(feature = "can", not(feature = "svd-f301")))]
 #[cfg_attr(docsrs, doc(cfg(feature = "can")))]
 pub mod can;
+pub mod dac;
 pub mod delay;
 pub mod dma;
 pub mod flash;

src/rcc/enable.rs

@@ -154,7 +154,12 @@ bus! {
     feature = "svd-f3x4"
 ))]
 bus! {
-    DAC1 => (APB1, dac1en,), // 29
+    DAC1 => (APB1, dac1en, dac1rst), // 29
+}
+
+#[cfg(any(feature = "svd-f302",))]
+bus! {
+    DAC => (APB1, dac1en, dac1rst), // 29
 }
 
 #[cfg(any(feature = "svd-f303", feature = "svd-f373", feature = "svd-f3x4"))]