1
1
//! Serial
2
2
3
+ use core:: convert:: Infallible ;
3
4
use core:: marker:: PhantomData ;
4
5
use core:: ptr;
5
6
7
+ use crate :: hal:: blocking:: serial:: write:: Default ;
6
8
use crate :: hal:: serial;
7
9
use crate :: stm32:: { USART1 , USART2 , USART3 } ;
8
10
use nb;
9
- use void:: Void ;
10
11
11
12
use crate :: gpio:: gpioa:: { PA10 , PA2 , PA3 , PA9 } ;
12
13
#[ cfg( any(
@@ -337,13 +338,13 @@ macro_rules! hal {
337
338
}
338
339
339
340
impl serial:: Write <u8 > for Tx <$USARTX> {
340
- // NOTE(Void ) See section "29.7 USART interrupts"; the only possible errors during
341
+ // NOTE(Infallible ) See section "29.7 USART interrupts"; the only possible errors during
341
342
// transmission are: clear to send (which is disabled in this case) errors and
342
343
// framing errors (which only occur in SmartCard mode); neither of these apply to
343
344
// our hardware configuration
344
- type Error = Void ;
345
+ type Error = Infallible ;
345
346
346
- fn flush( & mut self ) -> nb:: Result <( ) , Void > {
347
+ fn flush( & mut self ) -> nb:: Result <( ) , Infallible > {
347
348
// NOTE(unsafe) atomic read with no side effects
348
349
let isr = unsafe { ( * $USARTX:: ptr( ) ) . isr. read( ) } ;
349
350
@@ -354,7 +355,7 @@ macro_rules! hal {
354
355
}
355
356
}
356
357
357
- fn write( & mut self , byte: u8 ) -> nb:: Result <( ) , Void > {
358
+ fn write( & mut self , byte: u8 ) -> nb:: Result <( ) , Infallible > {
358
359
// NOTE(unsafe) atomic read with no side effects
359
360
let isr = unsafe { ( * $USARTX:: ptr( ) ) . isr. read( ) } ;
360
361
@@ -370,6 +371,8 @@ macro_rules! hal {
370
371
}
371
372
}
372
373
}
374
+
375
+ impl Default <u8 > for Tx <$USARTX> { }
373
376
) +
374
377
}
375
378
}
0 commit comments