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Merge #587
587: Improve SPI::new* docs r=burrbull a=qwerty19106 Add `SPI::new*` and `SpiExt::spi*` docs. See [#564](#564) for details. Co-authored-by: Роман Кривенков <[email protected]>
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CHANGELOG.md

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@@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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## [Unreleased]
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- Improve SPI::new* docs [#587]
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## [v0.15.0] - 2023-03-13
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### Changed

src/spi.rs

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@@ -236,6 +236,11 @@ pub trait SpiExt: Sized + Instance {
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}
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impl<SPI: Instance> SpiExt for SPI {
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/// Enables the SPI clock, resets the peripheral, sets `Alternate` mode for `pins` and initialize the peripheral as SPI Master Normal mode.
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///
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/// # Note
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/// Depending on `freq` you may need to set GPIO speed for `pins` (the `Speed::Low` is default for GPIO) before create `Spi` instance.
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/// Otherwise it may lead to the 'wrong last bit in every received byte' problem.
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fn spi<SCK, MISO, MOSI>(
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self,
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pins: (SCK, MISO, MOSI),
@@ -248,6 +253,11 @@ impl<SPI: Instance> SpiExt for SPI {
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{
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Spi::new(self, pins, mode, freq, clocks)
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}
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/// Enables the SPI clock, resets the peripheral, sets `Alternate` mode for `pins` and initialize the peripheral as SPI Master BIDI mode.
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///
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/// # Note
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/// Depending on `freq` you may need to set GPIO speed for `pins` (the `Speed::Low` is default for GPIO) before create `Spi` instance.
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/// Otherwise it may lead to the 'wrong last bit in every received byte' problem.
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fn spi_bidi<SCK, MISO, MOSI>(
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self,
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pins: (SCK, MISO, MOSI),
@@ -260,6 +270,11 @@ impl<SPI: Instance> SpiExt for SPI {
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{
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Spi::new_bidi(self, pins, mode, freq, clocks)
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}
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/// Enables the SPI clock, resets the peripheral, sets `Alternate` mode for `pins` and initialize the peripheral as SPI Slave Normal mode.
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///
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/// # Note
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/// Depending on `freq` you may need to set GPIO speed for `pins` (the `Speed::Low` is default for GPIO) before create `Spi` instance.
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/// Otherwise it may lead to the 'wrong last bit in every received byte' problem.
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fn spi_slave<SCK, MISO, MOSI>(
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self,
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pins: (SCK, MISO, MOSI),
@@ -272,6 +287,11 @@ impl<SPI: Instance> SpiExt for SPI {
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{
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Spi::new_slave(self, pins, mode, freq, clocks)
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}
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/// Enables the SPI clock, resets the peripheral, sets `Alternate` mode for `pins` and initialize the peripheral as SPI Slave BIDI mode.
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///
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/// # Note
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/// Depending on `freq` you may need to set GPIO speed for `pins` (the `Speed::Low` is default for GPIO) before create `Spi` instance.
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/// Otherwise it may lead to the 'wrong last bit in every received byte' problem.
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fn spi_bidi_slave<SCK, MISO, MOSI>(
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self,
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pins: (SCK, MISO, MOSI),
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}
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impl<SPI: Instance, SCK, MISO, MOSI> Spi<SPI, (SCK, MISO, MOSI), false, u8, Master> {
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/// Enables the SPI clock, resets the peripheral, sets `Alternate` mode for `pins` and initialize the peripheral as SPI Master Normal mode.
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///
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/// # Note
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/// Depending on `freq` you may need to set GPIO speed for `pins` (the `Speed::Low` is default for GPIO) before create `Spi` instance.
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/// Otherwise it may lead to the 'wrong last bit in every received byte' problem.
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pub fn new(
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spi: SPI,
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mut pins: (SCK, MISO, MOSI),
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}
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impl<SPI: Instance, SCK, MISO, MOSI> Spi<SPI, (SCK, MISO, MOSI), true, u8, Master> {
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/// Enables the SPI clock, resets the peripheral, sets `Alternate` mode for `pins` and initialize the peripheral as SPI Master BIDI mode.
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///
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/// # Note
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/// Depending on `freq` you may need to set GPIO speed for `pins` (the `Speed::Low` is default for GPIO) before create `Spi` instance.
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/// Otherwise it may lead to the 'wrong last bit in every received byte' problem.
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pub fn new_bidi(
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spi: SPI,
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mut pins: (SCK, MISO, MOSI),
@@ -403,6 +433,11 @@ impl<SPI: Instance, SCK, MISO, MOSI> Spi<SPI, (SCK, MISO, MOSI), true, u8, Maste
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}
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impl<SPI: Instance, SCK, MISO, MOSI> Spi<SPI, (SCK, MISO, MOSI), false, u8, Slave> {
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/// Enables the SPI clock, resets the peripheral, sets `Alternate` mode for `pins` and initialize the peripheral as SPI Slave Normal mode.
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///
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/// # Note
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/// Depending on `freq` you may need to set GPIO speed for `pins` (the `Speed::Low` is default for GPIO) before create `Spi` instance.
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/// Otherwise it may lead to the 'wrong last bit in every received byte' problem.
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pub fn new_slave(
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spi: SPI,
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mut pins: (SCK, MISO, MOSI),
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}
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impl<SPI: Instance, SCK, MISO, MOSI> Spi<SPI, (SCK, MISO, MOSI), true, u8, Slave> {
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/// Enables the SPI clock, resets the peripheral, sets `Alternate` mode for `pins` and initialize the peripheral as SPI Slave BIDI mode.
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///
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/// # Note
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/// Depending on `freq` you may need to set GPIO speed for `pins` (the `Speed::Low` is default for GPIO) before create `Spi` instance.
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/// Otherwise it may lead to the 'wrong last bit in every received byte' problem.
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pub fn new_bidi_slave(
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spi: SPI,
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mut pins: (SCK, MISO, MOSI),

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